Abstract: The described embodiments provide a system for controlling an integrated circuit memory device by a memory controller. During operation, the system sends a memory-access request from the memory controller to the memory device using a first link. After sending the memory-access request, the memory controller sends to the memory device a command that specifies performing a timing-calibration operation for a second link. The system subsequently transfers data associated with the memory-access request using the second link, wherein the timing-calibration operation occurs between sending the memory-access request and transferring the data associated with the memory-access request.

Abstract: The described embodiments provide a system for controlling an integrated circuit memory device by a memory controller. During operation, the system sends a memory-access request from the memory controller to the memory device using a first link. After sending the memory-access request, the memory controller sends to the memory device a command that specifies performing a timing-calibration operation for a second link. The system subsequently transfers data associated with the memory-access request using the second link, wherein the timing-calibration operation occurs between sending the memory-access request and transferring the data associated with the memory-access request.

Abstract: The described embodiments provide a system for controlling an integrated circuit memory device by a memory controller. During operation, the system sends a memory-access request from the memory controller to the memory device using a first link. After sending the memory-access request, the memory controller sends to the memory device a command that specifies performing a timing-calibration operation for a second link. The system subsequently transfers data associated with the memory-access request using the second link, wherein the timing-calibration operation occurs between sending the memory-access request and transferring the data associated with the memory-access request.

Abstract: The described embodiments provide a system for controlling an integrated circuit memory device by a memory controller. During operation, the system sends a memory-access request from the memory controller to the memory device using a first link. After sending the memory-access request, the memory controller sends to the memory device a command that specifies performing a timing-calibration operation for a second link. The system subsequently transfers data associated with the memory-access request using the second link, wherein the timing-calibration operation occurs between sending the memory-access request and transferring the data associated with the memory-access request.

Abstract: The described embodiments provide a system for controlling an integrated circuit memory device by a memory controller. During operation, the system sends a memory-access request from the memory controller to the memory device using a first link. After sending the memory-access request, the memory controller sends to the memory device a command that specifies performing a timing-calibration operation for a second link. The system subsequently transfers data associated with the memory-access request using the second link, wherein the timing-calibration operation occurs between sending the memory-access request and transferring the data associated with the memory-access request.

Abstract: The described embodiments provide a system for controlling an integrated circuit memory device by a memory controller. During operation, the system sends a memory-access request from the memory controller to the memory device using a first link. After sending the memory-access request, the memory controller sends to the memory device a command that specifies performing a timing-calibration operation for a second link. The system subsequently transfers data associated with the memory-access request using the second link, wherein the timing-calibration operation occurs between sending the memory-access request and transferring the data associated with the memory-access request.

Abstract: The described embodiments provide a system for controlling an integrated circuit memory device by a memory controller. During operation, the system sends a memory-access request from the memory controller to the memory device using a first link. After sending the memory-access request, the memory controller sends to the memory device a command that specifies performing a timing-calibration operation for a second link. The system subsequently transfers data associated with the memory-access request using the second link, wherein the timing-calibration operation occurs between sending the memory-access request and transferring the data associated with the memory-access request.

Abstract: In a ring having first and second adjacent nodes, and two fibers carrying information between the first and second nodes, the first fiber carries information in one direction, while the second fiber carries information in another direction. Each fiber includes wavelength capacity allocated to working and protection traffic. The working and protection wavelength capacities in the first fiber are respectively assigned to first and second disjoint sets of wavelengths, while the working and protection wavelength capacities in the second fiber are respectively assigned to the second and first disjoint sets of wavelengths.

Abstract: A system includes a computing device that selectively communicates with a self-powered device. The self-powered device has several modes of operation, including a first low-power mode of operation and a second high-power mode of operation. The self-powered device is to communicate with the computing device when the self-powered device is in the second mode of operation. The self-powered device may conserve power by alternating between the first mode of operation and the second mode of operation such that the self-powered device is in the second mode of operation during pre-determined or adaptively-determined time intervals. A duty-cycle of the second mode of operation relative to the first mode of operation may be in accordance with a power budget for the self-powered device.

Abstract: In a ring having first and second adjacent nodes, and two fibers carrying information between the first and second nodes, the first fiber carries information in one direction, while the second fiber carries information in another direction. Each fiber includes wavelength capacity allocated to working and protection traffic. The working and protection wavelength capacities in the first fiber are respectively assigned to first and second disjoint sets of wavelengths, while the working and protection wavelength capacities in the second fiber are respectively assigned to the second and first disjoint sets of wavelengths.

Abstract: In a ring having first and second adjacent nodes, and two fibers carrying information between the first and second nodes, the first fiber carries information in one direction, while the second fiber carries information in another direction. Each fiber includes wavelength capacity allocated to working and protection traffic. The working and protection wavelength capacities in the first fiber are respectively assigned to first and second disjoint sets of wavelengths, while the working and protection wavelength capacities in the second fiber are respectively assigned to the second and first disjoint sets of wavelengths.

Abstract: A system for use in a bi-directional path switched ring network for detecting a failed optical path and establishing a protection path so as to allow signals from the failed optical path to be re-routed via the protection path is provided. According to one aspect of the system, upon detecting a failure relating to an optical path, the destination node generates a connection request message for transmission to the source node. The connection request message is passed to the source node via one or more intermediate nodes, if any. Each intermediate node examines the connection request message accordingly reserves the requisite wavelength from the protection capacity so as to allow signals from the failed optical path to be re-routed. Upon receiving the connection request message, the source node readies its switching equipment to re-route signals from the failed optical path and generates an acknowledgment message and propagates it back to the destination node via the intermediate nodes.