Patents by Inventor Holger Hübner

Holger Hübner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9414447
    Abstract: In various embodiments, a light emitting diode module may include a carrier plate, at least one light emitting diode, and at least one sensor configured to register light emitted by the light emitting diode. The light emitting diode is attached to a light emitting diode installation side of the carrier plate. The sensor is installed countersunk through a hole of the carrier plate in relation to the light emitting diode installation side thereof.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: August 9, 2016
    Assignee: OSRAM GmbH
    Inventors: Farhang Ghasemi Afshar, Krister Bergenek, Andreas Dobner, Holger Huebner, Meik Weckbecker, Ralph Wirth
  • Patent number: 9301396
    Abstract: A connecting element can be used for a multi-chip module. The connecting element is provided for establishing an electrical connection between two elements and has a carrier and a first electrically conductive connecting structure on a first main surface of the carrier. The first connecting structure is designed in such a way that the first connecting structure connects the first and second elements to each other. A multi-chip module can have such a connecting element and two elements, wherein the two elements are electrically connected to each other in a wireless manner by the connecting element.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: March 29, 2016
    Assignee: OSRAM GmbH
    Inventors: Holger Hübner, Björn Hoxhold, Axel Kaltenbacher
  • Patent number: 8872335
    Abstract: It is proposed a method of manufacturing an electronic system wherein a first substrate comprising first connection elements on a first surface of the first substrate is provided; a second substrate comprising second connection elements on a first surface of the second substrate is provided; a polymer layer is applied to at least one of the two first surfaces; the first connection elements are attached to the second connection elements; and the polymer layer is caused to swell during or after the attachment.
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: October 28, 2014
    Assignee: Infineon Technologies AG
    Inventors: Holger Huebner, Martin Franosch
  • Publication number: 20140291003
    Abstract: A connecting element can be used for a multi-chip module. The connecting element is provided for establishing an electrical connection between two elements and has a carrier and a first electrically conductive connecting structure on a first main surface of the carrier. The first connecting structure is designed in such a way that the first connecting structure connects the first and second elements to each other. A multi-chip module can have such a connecting element and two elements, wherein the two elements are electrically connected to each other in a wireless manner by the connecting element.
    Type: Application
    Filed: August 3, 2012
    Publication date: October 2, 2014
    Applicant: OSRAM GMBH
    Inventors: Holger Hübner, Björn Hoxhold, Axel Kaltenbacher
  • Publication number: 20140191255
    Abstract: In various embodiments, a light emitting diode module may include a carrier plate, at least one light emitting diode, and at least one sensor configured to register light emitted by the light emitting diode. The light emitting diode is attached to a light emitting diode installation side of the carrier plate. The sensor is installed countersunk through a hole of the carrier plate in relation to the light emitting diode installation side thereof.
    Type: Application
    Filed: December 19, 2013
    Publication date: July 10, 2014
    Applicant: OSRAM GmbH
    Inventors: Farhang Ghasemi Afshar, Krister Bergenek, Andreas Dobner, Holger Huebner, Meik Weckbecker, Ralph Wirth
  • Publication number: 20090045444
    Abstract: An integrated circuit, comprising a substrate stack, comprising a first substrate and a second substrate, the first substrate comprising a first contact field on a side face of the substrate stack and the second substrate comprising a second contact field on the side face; a side substrate, comprising a first contact pad and a second contact pad, the first contact pad being coupled to the second contact pad; first connection, connecting the first contact field and the first contact pad; and a second connection, connecting the second contact field and the second contact pad.
    Type: Application
    Filed: August 13, 2007
    Publication date: February 19, 2009
    Inventor: Holger Huebner
  • Publication number: 20090026607
    Abstract: It is proposed a method of manufacturing an electronic system wherein a first substrate comprising first connection elements on a first surface of the first substrate is provided; a second substrate comprising second connection elements on a first surface of the second substrate is provided; a polymer layer is applied to at least one of the two first surfaces; the first connection elements are attached to the second connection elements; and the polymer layer is caused to swell during or after the attachment.
    Type: Application
    Filed: July 23, 2007
    Publication date: January 29, 2009
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Holger HUEBNER, Martin FRANOSCH
  • Patent number: 6930383
    Abstract: The invention relates to an electronic component including a housing and a first substrate having at least one integrated circuit, a multiplicity of contact surfaces arranged in an arbitrary distribution on the surface of the first substrate. A second substrate forms a housing and is mechanically joined to the surface of the first substrate in a surface-to-surface contact, via an insulating joining layer. The second substrate has contact connection surfaces that are surface-to-surface connected to the contact surfaces of the first substrate in an electrically conductive manner. The second substrate has symmetrically arranged external contact surfaces that are conductively connected to the contact connection surfaces via through-contacts in the second substrate.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: August 16, 2005
    Assignee: Infineon Technologies AG
    Inventors: Hans-Jürgen Hacke, Holger Hübner, Axel Königer, Max-Gerhard Seitz, Rainer Tilgner
  • Patent number: 6915945
    Abstract: For the purpose of contact-connecting an electrical component, in particular a semiconductor component, on a substrate having a conductor structure, a joining temperature is chosen in such a way that the substrate, with a pressure being exerted on the electrical component, experiences a plastic deformation, with the result that the electrical component is pressed together with the conductor structure into the substrate in a positively locking manner. In order to produce the connection between the component and the substrate, use is preferably made of a thin diffusion solder layer which can be processed at temperatures lying below the melting point of the substrate.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: July 12, 2005
    Assignee: Infineon Technologies AG
    Inventor: Holger Hübner
  • Patent number: 6906370
    Abstract: A semiconductor component having a material-reinforced contact area formed of a metal layer is disclosed. The contact area is jointly formed by a second metal area of a first metal layer and a fourth metal area of a second metal layer which is to be contacted. A thickness of the contact area material is at least twice that of a single metal layer and thereby prevents penetrative etching when a hole is created for contacting the metal layer.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: June 14, 2005
    Assignee: Infineon Technologies AG
    Inventors: Holger Hübner, Thomas Röhr
  • Patent number: 6872464
    Abstract: A soldering agent for use in diffusion soldering processes contains, in a soldering paste, a mixture of at least partially metallic grains of a high-melting metal and a solder metal. In a diffusion soldering process, the solder metal reacts completely with the high-melting metal and metals belonging to parts that are to be joined to one another by the soldering process, to form an intermetallic phase.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: March 29, 2005
    Assignee: Infineon Technologies AG
    Inventors: Holger Hübner, Vaidyanathan Kripesh
  • Patent number: 6773956
    Abstract: A solder metal made of a eutectic or stoichiometric composition including at least two metallic or semiconducting elements is applied to a contact (of the semiconductor component, brought into contact with the metal layer of a metallized film and alloyed by heating into the metal layer of the film, thereby producing an electrically conductive connection having a higher melting point. A solder metal that is particularly suitable for such a purpose is the Bi22In78 (melting point 73° C.), Bi43Sn57, or In52Sn48, or BiIn, or BiIn2.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventors: Holger Huebner, Vaidyanathan Kripesh
  • Patent number: 6709949
    Abstract: In the three-dimensional integration of integrated circuits, a thinned semiconductor substrate is arranged on a second semiconductor substrate and is mechanically and electrically connected thereto. To that end, in the second, thinned semiconductor substrate, continuous contact holes are formed proceeding from a substrate rear side as far as a first metal wiring plane on a substrate front side. In order to align the contact holes with the structures arranged on the front side, a structure is arranged on the front side of the substrate, which can be used as an alignment mark on the front side. The structure is overgrown with a useful layer and uncovered proceeding from the rear side of the substrate, so that the structure can also be used as an alignment mark from the rear side. This avoids an alignment error between the structures arranged on the front side and the rear side.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: March 23, 2004
    Assignee: Infineon Technologies AG
    Inventor: Holger Hübner
  • Publication number: 20030176054
    Abstract: A solder metal made of a eutectic or stoichiometric composition including at least two metallic or semiconducting elements is applied to a contact (of the semiconductor component, brought into contact with the metal layer of a metallized film and alloyed by heating into the metal layer of the film, thereby producing an electrically conductive connection having a higher melting point. A solder metal that is particularly suitable for such a purpose is the Bi22In78 (melting point 73° C.), Bi43Sn57, or In52Sn48, or BiIn, or BiIn2.
    Type: Application
    Filed: January 28, 2003
    Publication date: September 18, 2003
    Inventors: Holger Huebner, Vaidyanathan Kripesh
  • Patent number: 6597053
    Abstract: An integrated circuit arrangement having a number of structural elements, at least one of which is surrounded by a metallic shielding structure. This structural element is thus protected against interference due to disturbing impulses from its environment. In particular, the structural elements of the circuit arrangement can be arranged next to or on top of one another. To produce the metallic shielding structure of a structural element of the circuit arrangement, at least one depression which surrounds the structural element is created and then lined with metal. The contacts and electrical connections of the structural element are electrically insulated from the metal of the shielding structure.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: July 22, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventors: Anton Anthofer, Holger Hübner
  • Patent number: 6268659
    Abstract: A semiconductor body with a layer of solder material and a method for soldering the semiconductor body include a chromium layer applied to a rear side of the semiconductor body, and a tin layer applied to the chromium layer. The semiconductor is subsequently soldered directly to the metal substrate, that is without further additives, by being heated to temperatures above 250° C. This metal layer system for soldering power semiconductors to cooling bodies enables two metal layers to be dispensed with as compared with known four metal layer systems.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: July 31, 2001
    Assignee: Infineon Technologies AG
    Inventors: Holger Huebner, Manfred Schneegans
  • Patent number: 5901901
    Abstract: In a semiconductor assembly with a solder material layer and a method for soldering the semiconductor assembly, a silicon semiconductor body with a diffusion barrier layer is provided with a solder material layer, preferably a tin layer. The semiconductor body is then applied to a metal carrier plate and is directly soldered to the carrier plate by heating to temperatures to above 250.degree. C., i.e. without further additions.
    Type: Grant
    Filed: February 19, 1997
    Date of Patent: May 11, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Manfred Schneegans, Holger Huebner
  • Patent number: 5610531
    Abstract: A function test is implemented for an individual circuit level (1) that is provided for vertical integration in a semiconductor component. Stacks of circuit levels respectively provided over or under this circuit level in the finished component are simulated as test heads (2, 3). These test heads are provided with terminal contacts for reversible contacting. The circuit level (1) under test is connected to these test heads (2, 3) during the function test, and the test heads are removed after the test.
    Type: Grant
    Filed: January 6, 1995
    Date of Patent: March 11, 1997
    Assignee: Siemens Aktiengesellschaft
    Inventors: Werner Weber, Siegmar Koeppe, Helmut Klose, Holger Huebner
  • Patent number: 5474651
    Abstract: For filling via holes that extend onto interconnects to be contacted in a semiconductor layer structure, the interconnects are connected to a conductive layer through auxiliary via holes. The via holes are filled with metal by electro-deposition, whereby the interconnects are wired as a cooperating electrode in an electrolyte via an auxiliary contact to the conductive layer. Subsequently, the conductive layer is removed.
    Type: Grant
    Filed: August 11, 1994
    Date of Patent: December 12, 1995
    Assignee: Siemens Aktiengesellschaft
    Inventor: Holger Huebner
  • Patent number: 5419806
    Abstract: A method for producing a three-dimensional circuit apparatus, wherein substrates that are arranged above one another are firmly joined to one another by depressions in the adjoining surfaces of the neighboring substrates. The depressions are filled with a mixture of two metal constituents, one being a liquid and the other being a solid and the solid constituent dissolves in the liquid constituent, which leads to the hardening of the mixture, and firmly joins the depressions to one another due to the hardening of the mixture. In addition, detached components are arranged on prepared substrate wafers and are firmly joined thereto.
    Type: Grant
    Filed: January 25, 1994
    Date of Patent: May 30, 1995
    Assignee: Siemens Aktiengesellschaft
    Inventor: Holger Huebner