Abstract: Circuitry for estimating an inductance of an inductor in power converter circuitry, the circuitry comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during an operational cycle of the power converter circuitry; circuitry for generating a ripple current estimate signal, indicative of an estimate of a ripple current in the power converter circuitry; and circuitry for applying the ripple current estimate signal to the peak inductor current signal to generate an average inductor current threshold signal indicative of an estimated average inductor current in the power converter circuitry during the operational cycle, wherein the ripple current estimate signal is based on: a duration of a charging phase of operation of the power converter circuitry; a voltage across the inductor; and an inductance value for the inductor; and wherein the circuitry for generating the ripple current estimate signal is operative to select an inductance value for the inductor for wh

Abstract: The present disclosure relates to circuitry comprising: pulse-width modulation (PWM) circuitry configured to generate a PWM output signal; and monitoring circuitry configured to monitor a supply voltage to the PWM circuitry and to output a control signal for controlling operation of the PWM circuitry, wherein the control signal is based on the supply voltage.

Abstract: The present disclosure relates to circuitry comprising: pulse-width modulation (PWM) circuitry configured to generate a PWM output signal; and monitoring circuitry configured to monitor a supply voltage to the PWM circuitry and to output a control signal for controlling operation of the PWM circuitry, wherein the control signal is based on the supply voltage.

Abstract: Methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter is operable so that a low side supply switch may be turned off, before the high side supply switch is turned on. During the period when both switches are off the current loop control remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.

Abstract: Power management integrated circuits (PMICs) and related methods. In one aspect a PMIC which is operable to provide a plurality of PMIC power states is arranged to provide a predetermined delay before a power state transition. The delay is applied after receipt by the PMIC control circuitry of a power state transition command. Applying a delay allows time for the system powered by the PMIC to perform any necessary shut-down procedures and terminate active processes before power is removed, preventing corruption of the system. The delay is preferably configurable. The PMIC may also be arranged to control power converters which are external to the PMIC. In another aspect the PMIC has translation circuitry for providing the control settings of one power block, e.g. power converter, with any necessary modifications to be used by another power block. This means that only one set of control settings needs to be updated to change the output of both power blocks simultaneously.

Abstract: Apparatus and method for power management and especially to power management integrated circuits (PMICs). In one aspect, the invention relates to a PMIC having an internal non-volatile memory (NVM) for storing boot settings for the PMIC. The PMIC also has control circuitry for detecting whether a source of boot settings is available, such as an NVM external to the PMIC, and, if so, using any settings stored in the external source in preference to the relevant settings stored in the internal NVM. The external settings can thus override any internal settings, which is useful for fault diagnosis and/or development. In one aspect the PMIC may have programming circuitry for automatically programming boot settings from an external source into the internal NVM.

Abstract: Methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter is operable so that a low side supply switch may be turned off, before the high side supply switch is turned on. During the period when both switches are off the current loop control remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.

Abstract: An apparatus and a method for charging and for charge monitoring of a rechargeable battery. A charging circuit contains a rechargeable battery (B) and a charging device (L) for charging the rechargeable battery. A measurement device (M) is arranged in the charging circuit and contains a device for determining the rechargeable-battery current and the state of charge of the rechargeable battery. A control device (R) compares a value that is proportional to the rechargeable-battery current with a set value, and controls the charging device.

Abstract: Methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter is operable so that a low side supply switch may be turned off, before the high side supply switch is turned on. During the period when both switches are off the current loop control remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.

Abstract: This application relates to switch mode DC-DC converter circuitry having a power switch operably connected between a supply node and an inductor node. The DC-DC converter has switch control circuitry for driving the power switch which is configured to controllably vary the rate of at least one of turn-on or turn-off of the first power switch. The rate may be based on the operational conditions of the converter, e.g. inductor current, one or more supply voltages and/or operating mode or activity level of a host device. By increasing the rate at which the switch turns-on or off switch transition power losses can be reduced. However a faster switching speed can lead to an increased voltage stress on the circuitry. Embodiments of the present invention varying the rate or turn-on and/or turn-off of the switch to reduce power losses but remain with the safe operating limits for the circuitry.

Abstract: Methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter is operable so that a low side supply switch may be turned off, before the high side supply switch is turned on. During the period when both switches are off the current loop control remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.

Abstract: Apparatus and method for power management and especially to power management integrated circuits (PMICs). In one aspect, the invention relates to a PMIC having an internal non-volatile memory (NVM) for storing boot settings for the PMIC. The PMIC also has control circuitry for detecting whether a source of boot settings is available, such as an NVM external to the PMIC, and, if so, using any settings stored in the external source in preference to the relevant settings stored in the internal NVM. The external settings can thus override any internal settings, which is useful for fault diagnosis and/or development. In one aspect the PMIC may have programming circuitry for automatically programming boot settings from an external source into the internal NVM.

Abstract: Power management integrated circuits (PMICs) and related methods. In one aspect a PMIC which is operable to provide a plurality of PMIC power states is arranged to provide a predetermined delay before a power state transition. The delay is applied after receipt by the PMIC control circuitry of a power state transition command. Applying a delay allows time for the system powered by the PMIC to perform any necessary shut-down procedures and terminate active processes before power is removed, preventing corruption of the system. The delay is preferably configurable. The PMIC may also be arranged to control power converters which are external to the PMIC. In another aspect the PMIC has translation circuitry for providing the control settings of one power block, e.g. power converter, with any necessary modifications to be used by another power block. This means that only one set of control settings needs to be updated to change the output of both power blocks simultaneously.

Abstract: A real-time clock circuit, comprising: an oscillator; and a counter, coupled to an output of the oscillator, for generating a real-time clock value. In a first mode the oscillator is configured to generate oscillations and the counter is configured to increment the real-time clock value based on the oscillations. In a second mode the oscillator is stopped, and the counter is configured to retain the real-time clock value at a frozen value.

Abstract: A converter including an inductor (L), a first switch (SW1, S1) connected between an input terminal (Vin) and the inductor, a diode/switch (D1, S2), connected between the first end of the inductor and ground, a diode/switch (D2, S3) connected between the inductor and an output terminal (Vout), and a second switch (SW2, S4) coupled between inductor and ground. A current sensor senses current in the first switch (SW1, S1) as a measure of inductor current. Waveform generators (31, 32) generate buck and boost slope compensation ramps (RMP-BUCK, RMP-BOOST). Control logic (10) opens and closes the switches every clock period at individual duty cycles determined using a feedback signal derived from the output terminal, the sensed current and the slope compensation ramps. The slope compensation ramps are mutually offset such that current sensing is needed only while the first switch (SW1, S1) is closed.

Abstract: An integrated circuit includes a comparator having a first input, a second input, and an output for providing a comparison result. The first input is connected to a readable component having a predefined value, and the second input is connected to a reference component. A control unit is at the output of the comparator. The control unit controls at least one function block based on the comparison result.

Abstract: A real time clock comprises a counter which stores a count value, the count value representing a time signal. The counter may be written, for example by a host processor (not shown), such that the time signal can be set to any desired value. The real time clock comprises a check register that stores a check value. The content of the check register (i.e. the check value) is modified each time a write operation is performed on the counter. For example, the content of the check register can be updated by a control signal each time a write operation is performed on the counter. The check value stored in the check register is used for determining whether a write operation performed on the counter is an authorized write operation or an unauthorized write operation. The check value may be incremented each time a write operation is performed, replaced with a new random number each time a write operation is performed, or a combination of both.

Abstract: A reliable start-up circuit for starting a bandgap type voltage reference generator which ensures that the bandgap reference cell will operate at a stable operating point before the start-up circuit is disabled.

Abstract: A current-mode switching regulator including at least: an inductor; a main switch for controlling the current flow through the inductor; and a feedback control circuit for operating the main switch cyclically and to vary a duty cycle of the main switch so as to substantially maintain an output voltage of the regulator at a desired level. The feedback control circuit further includes slope compensation circuitry adding slope compensation to a signal representing the inductor current prior to the slope compensated signal being compared to the fed-back output error voltage.

Abstract: A real time clock comprises a counter which stores a count value, the count value representing a time signal. The counter may be written, for example by a host processor (not shown), such that the time signal can be set to any desired value. The real time clock comprises a check register that stores a check value. The content of the check register (i.e. the check value) is modified each time a write operation is performed on the counter. For example, the content of the check register can be updated by a control signal each time a write operation is performed on the counter. The check value stored in the check register is used for determining whether a write operation performed on the counter is an authorized write operation or an unauthorized write operation. The check value may be incremented each time a write operation is performed, replaced with a new random number each time a write operation is performed, or a combination of both.