Abstract: In various embodiments, a light emitting diode module may include a carrier plate, at least one light emitting diode, and at least one sensor configured to register light emitted by the light emitting diode. The light emitting diode is attached to a light emitting diode installation side of the carrier plate. The sensor is installed countersunk through a hole of the carrier plate in relation to the light emitting diode installation side thereof.

Abstract: It is proposed a method of manufacturing an electronic system wherein a first substrate comprising first connection elements on a first surface of the first substrate is provided; a second substrate comprising second connection elements on a first surface of the second substrate is provided; a polymer layer is applied to at least one of the two first surfaces; the first connection elements are attached to the second connection elements; and the polymer layer is caused to swell during or after the attachment.

Abstract: In various embodiments, a light emitting diode module may include a carrier plate, at least one light emitting diode, and at least one sensor configured to register light emitted by the light emitting diode. The light emitting diode is attached to a light emitting diode installation side of the carrier plate. The sensor is installed countersunk through a hole of the carrier plate in relation to the light emitting diode installation side thereof.

Abstract: An integrated circuit, comprising a substrate stack, comprising a first substrate and a second substrate, the first substrate comprising a first contact field on a side face of the substrate stack and the second substrate comprising a second contact field on the side face; a side substrate, comprising a first contact pad and a second contact pad, the first contact pad being coupled to the second contact pad; first connection, connecting the first contact field and the first contact pad; and a second connection, connecting the second contact field and the second contact pad.

Abstract: It is proposed a method of manufacturing an electronic system wherein a first substrate comprising first connection elements on a first surface of the first substrate is provided; a second substrate comprising second connection elements on a first surface of the second substrate is provided; a polymer layer is applied to at least one of the two first surfaces; the first connection elements are attached to the second connection elements; and the polymer layer is caused to swell during or after the attachment.

Abstract: A solder metal made of a eutectic or stoichiometric composition including at least two metallic or semiconducting elements is applied to a contact (of the semiconductor component, brought into contact with the metal layer of a metallized film and alloyed by heating into the metal layer of the film, thereby producing an electrically conductive connection having a higher melting point. A solder metal that is particularly suitable for such a purpose is the Bi22In78 (melting point 73° C.), Bi43Sn57, or In52Sn48, or BiIn, or BiIn2.

Abstract: A solder metal made of a eutectic or stoichiometric composition including at least two metallic or semiconducting elements is applied to a contact (of the semiconductor component, brought into contact with the metal layer of a metallized film and alloyed by heating into the metal layer of the film, thereby producing an electrically conductive connection having a higher melting point. A solder metal that is particularly suitable for such a purpose is the Bi22In78 (melting point 73° C.), Bi43Sn57, or In52Sn48, or BiIn, or BiIn2.

Abstract: A semiconductor body with a layer of solder material and a method for soldering the semiconductor body include a chromium layer applied to a rear side of the semiconductor body, and a tin layer applied to the chromium layer. The semiconductor is subsequently soldered directly to the metal substrate, that is without further additives, by being heated to temperatures above 250° C. This metal layer system for soldering power semiconductors to cooling bodies enables two metal layers to be dispensed with as compared with known four metal layer systems.

Abstract: In a semiconductor assembly with a solder material layer and a method for soldering the semiconductor assembly, a silicon semiconductor body with a diffusion barrier layer is provided with a solder material layer, preferably a tin layer. The semiconductor body is then applied to a metal carrier plate and is directly soldered to the carrier plate by heating to temperatures to above 250.degree. C., i.e. without further additions.

Abstract: A function test is implemented for an individual circuit level (1) that is provided for vertical integration in a semiconductor component. Stacks of circuit levels respectively provided over or under this circuit level in the finished component are simulated as test heads (2, 3). These test heads are provided with terminal contacts for reversible contacting. The circuit level (1) under test is connected to these test heads (2, 3) during the function test, and the test heads are removed after the test.

Abstract: For filling via holes that extend onto interconnects to be contacted in a semiconductor layer structure, the interconnects are connected to a conductive layer through auxiliary via holes. The via holes are filled with metal by electro-deposition, whereby the interconnects are wired as a cooperating electrode in an electrolyte via an auxiliary contact to the conductive layer. Subsequently, the conductive layer is removed.

Abstract: A method for producing a three-dimensional circuit apparatus, wherein substrates that are arranged above one another are firmly joined to one another by depressions in the adjoining surfaces of the neighboring substrates. The depressions are filled with a mixture of two metal constituents, one being a liquid and the other being a solid and the solid constituent dissolves in the liquid constituent, which leads to the hardening of the mixture, and firmly joins the depressions to one another due to the hardening of the mixture. In addition, detached components are arranged on prepared substrate wafers and are firmly joined thereto.

Abstract: A method for producing a resist structure on a semiconductor material which has an opening tapering towards the semiconductor material is provided. This method can be used, for example, for the manufacturing of T-gate metallizations in a field effect transistor. In this method, a thin, upper resist layer is structured, and the structure is transferred onto a silicon nitride layer. The structure is then transferred into a thickly applied resist while widening the upper part of the etching profile. The method is accomplished by a succession of anisotropic and isotropic dry etching steps.

Abstract: The apparatus includes a means for generating a magnetic field at a first electrode to which a high frequency voltage is applied and includes a generator for generating a rectangular low frequency voltage that is capacitively coupled to a second electrode which carries the substrate to be etched. The low frequency voltage comprises a negative half-wave having a short duration and a positive half-wave. The duration of the negative half-wave is selected to be shorter than a time constant for charging the substrate after a potential change corresponding to the amplitude of the half-wave and the positive half-wave is dimensioned so that the substrate remains free of charges on the average.