Abstract: A power supply apparatus including a signal generator circuit configured to generate a plurality of power supply signals via at least one DC-to-DC converter, the plurality of power supply signals including a first power supply signal on a first output path and a second power supply signal on a second output path that is independent of the first output path, the first power supply signal being different from the second power supply signal. The apparatus includes a switching circuit to provide during a first operating mode, a first combined power supply signal on the first output path based on the first power supply signal and a third power supply signal of the plurality of power supply signals. The switching circuit provides during a second operating mode, a second combined power supply signal on the second output path based on the second power supply signal and the third power supply signal.

Abstract: Some embodiments include apparatus and methods for using a direct-current to direct-current (DCDC) converter and a control unit coupled to the DCDC converter. The DCDC converter includes a first node to receive an input signal, a second node to couple to a terminal of an inductor, and a third node to couple to an output node. The DCDC converter includes a driver controlled by a signal. The control unit is arranged to generate control information based on a duty cycle of the signal to control the duty cycle range of the signal.

Abstract: Systems, methods, and circuitries for regulating voltage supplied to a power amplifier are disclosed. In one example, a buck-boost control system is configured to control a buck-boost converter to operate in either a buck mode or a boost mode. The system includes compensator circuitry configured to determine a target current based on a difference between a target voltage and a regulated output voltage of the buck-boost converter and determine a tolerance current that, with the target current, defines a range of expected coil current for the present operating mode. Based on the difference between the target voltage and the regulated output voltage, a charge control signal or a discharge control signal is generated for the converter to cause the coil current to approach the target current. Mode control circuitry is configured to switch the buck-boost converter to the other operating mode when the coil current reaches the tolerance current.

Abstract: An apparatus for generating a plurality of power supply signals for a plurality of power amplifiers configured to amplify radio frequency transmit signals includes a first power supply circuit configured to generate a first power supply signal and a different second power supply signal. The first power supply circuit is configured to provide the first power supply signal to a first output path and the second power supply signal to a second output path. Further, the apparatus includes a second power supply circuit configured to generate a third power supply signal. Still further, the apparatus includes a switching circuit configured to couple the second power supply circuit to the first output path in a first operating mode to provide a first combined power supply signal at an output of the first output path based on the first power supply signal and the third power supply signal.

Abstract: An apparatus for generating a plurality of power supply signals for a plurality of power amplifiers configured to amplify radio frequency transmit signals includes a first power supply circuit configured to generate a first power supply signal and a different second power supply signal. The first power supply circuit is configured to provide the first power supply signal to a first output path and the second power supply signal to a second output path. Further, the apparatus includes a second power supply circuit configured to generate a third power supply signal. Still further, the apparatus includes a switching circuit configured to couple the second power supply circuit to the first output path in a first operating mode to provide a first combined power supply signal at an output of the first output path based on the first power supply signal and the third power supply signal.

Abstract: Embodiments include apparatuses, systems, and methods including a switching converter having an output stage including a power switch or first switching device to convert an input switching signal to an output switching signal and a sensor stage including a second switching device and a third switching device. In embodiments, the sensor stage may be coupled to receive the output switching signal from the first switching device and to substantially replicate a condition of the first switching device to generate a continuous signal rather than a switched signal. In embodiments, the continuous signal may allow detection of a current level. In some embodiments, the current level may indicate an overcurrent event. A digital post-processing circuit may be coupled to the switching device to count a number of overcurrent events according to various embodiments. Other embodiments may also be described and claimed.

Abstract: Some embodiments include apparatus and methods for using a direct-current to direct-current (DCDC) converter and a control unit coupled to the DCDC converter. The DCDC converter includes a first node to receive an input signal, a second node to couple to a terminal of an inductor, and a third node to couple to an output node. The DCDC converter includes a driver controlled by a signal. The control unit is arranged to generate control information based on a duty cycle of the signal to control the duty cycle range of the signal.

Abstract: Embodiments include apparatuses, systems, and methods including a switching converter having an output stage including a power switch or first switching device to convert an input switching signal to an output switching signal and a sensor stage including a second switching device and a third switching device. In embodiments, the sensor stage may be coupled to receive the output switching signal from the first switching device and to substantially replicate a condition of the first switching device to generate a continuous signal rather than a switched signal. In embodiments, the continuous signal may allow detection of a current level. In some embodiments, the current level may indicate an overcurrent event. A digital post-processing circuit may be coupled to the switching device to count a number of overcurrent events according to various embodiments. Other embodiments may also be described and claimed.

Abstract: An apparatus for generating a plurality of power supply signals for a plurality of power amplifiers configured to amplify radio frequency transmit signals includes a first power supply circuit configured to generate a first power supply signal and a different second power supply signal. The first power supply circuit is configured to provide the first power supply signal to a first output path and the second power supply signal to a second output path. Further, the apparatus includes a second power supply circuit configured to generate a third power supply signal. Still further, the apparatus includes a switching circuit configured to couple the second power supply circuit to the first output path in a first operating mode to provide a first combined power supply signal at an output of the first output path based on the first power supply signal and the third power supply signal.

Abstract: According to one embodiment, a line driver circuit comprises a plurality of output stages each operable to produce an output signal and one or more pre-output stages operable to perform one or more common functions. The line driver circuit also comprises circuitry operable to selectively couple one or more of the output stages to the one or more pre-output stages based on a wireline communication technology implemented by the line driver circuit.

Abstract: Disclosed herein are systems and methods for fast phase alignment and clock and data recovery. Systems and methods may include a fast phase alignment component configured to generate a selected phase signal based on a characteristic of an incoming signal. A clock and data recovery component may also be configured to receive the selected phase signal and perform a clock and data recovery function on the incoming signal using the selected phase signal.

Abstract: One embodiment of the present invention relates to a phase alignment system including a plurality of samplers, a clock distributor, a phase detector and a phase alignment control. The samplers are configured to receive an incoming signal and a phase adjusted clock signal and to provide samples according to the incoming signal. The clock distributor receives a clock adjustment signal and generates the phase adjusted clock signal, which triggers sampling of the incoming signal. The clock adjustment signal indicates a direction of phase adjustment and can include an amount of phase adjustment. The phase detector receives the samples and provides extended phase alignment commands derived from the samples. The phase alignment control receives the extended phase alignment commands and provides the clock adjustment signal to the clock distributor.

Abstract: One embodiment of the present invention relates to a phase alignment system including a plurality of samplers, a clock distributor, a phase detector and a phase alignment control. The samplers are configured to receive an incoming signal and a phase adjusted clock signal and to provide samples according to the incoming signal. The clock distributor receives a clock adjustment signal and generates the phase adjusted clock signal, which triggers sampling of the incoming signal. The clock adjustment signal indicates a direction of phase adjustment and can include an amount of phase adjustment. The phase detector receives the samples and provides extended phase alignment commands derived from the samples. The phase alignment control receives the extended phase alignment commands and provides the clock adjustment signal to the clock distributor.

Abstract: A transceiver includes a receiver unit including a clock and data recovery unit. The transceiver includes a transmitter unit and a digital core coupled to the receiver unit and the transmitter unit. A switch circuit is positioned after the clock and data recovery unit, and is configured to route data from the receiver unit to the transmitter unit in a test mode of the transceiver.

Abstract: Disclosed herein are systems and methods for fast phase alignment and clock and data recovery. Systems and methods may include a fast phase alignment component configured to generate a selected phase signal based on a characteristic of an incoming signal. A clock and data recovery component may also be configured to receive the selected phase signal and perform a clock and data recovery function on the incoming signal using the selected phase signal.

Abstract: In an embodiment, a circuit is disclosed comprising a circuit portion coupled to a terminal and a calibration circuit portion coupled to said terminal.

Abstract: An integrated circuit includes an output terminal to be coupled to a light-emitting diode, an output circuit coupled to the output terminal, the output circuit being configured to supply an operating signal to the light-emitting diode, a measuring circuit coupled to the output terminal and a control circuit coupled to the measuring circuit. The measuring circuit is configured to sense on the output terminal a signal value outside an operating regime of the light-emitting diode, the signal value being a voltage below a forward voltage of the light-emitting diode or a current below a threshold current of the light-emitting diode. The control circuit is configured to configure at least one function of the integrated circuit when the signal value as sensed by the measuring circuit corresponds to a voltage below the forward voltage of the light-emitting diode or a current below the threshold current of the light-emitting diode.

Abstract: In an embodiment, a circuit is disclosed comprising a circuit portion coupled to a terminal and a calibration circuit portion coupled to said terminal.

Abstract: An integrated circuit comprises an output terminal to be coupled to a non-linear circuit element, an output circuit coupled to the output terminal, the output circuit being configured to supply an operating signal to the non-linear circuit element, a measuring circuit coupled to the output terminal, the measuring circuit being configured to sense on the output terminal a signal value outside an operating regime of the non-linear circuit element, and a control circuit coupled to the measuring circuit, the control circuit being configured to configure at least one function of the integrated circuit on the basis of the signal value sensed by the measuring circuit.

Abstract: According to one embodiment, a line driver circuit comprises a plurality of output stages each operable to produce an output signal and one or more pre-output stages operable to perform one or more common functions. The line driver circuit also comprises circuitry operable to selectively couple one or more of the output stages to the one or more pre-output stages based on a wireline communication technology implemented by the line driver circuit.