Patents by Inventor Holli Harper

Holli Harper has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Yield enhancement technique for integrated circuit processing to reduce effects of undesired dielectric moisture retention and subsequent hydrogen out-diffusion
    Patent number: 6190926
    Abstract: A yield enhancement technique for integrated circuit processing which reduces the deleterious effects of H2O contamination which is absorbed by conventional dielectric films resulting in an undesired subsequent out-diffusion of hydrogen when the integrated circuit die is subsequently subjected to relatively high processing temperatures such as those experienced in CERDIP packaging. The technique disclosed comprises the formation of an interlevel dielectric layer having hydrophilic properties (for example, 7.5% phosphorus doped TEOS) at least partially surrounding a device on the integrated circuit which layer is then subjected to an annealing operation to drive off at least a portion of any moisture present therein.
    Type: Grant
    Filed: July 19, 1999
    Date of Patent: February 20, 2001
    Assignee: Ramtron International Corporation
    Inventors: Stanley C. Perino, Sanjay Mitra, George Argos, Jr., Holli Harper
  • Yield enhancement technique for integrated circuit processing to reduce effects of undesired dielectric moisture retention and subsequent hydrogen out-diffusion
    Patent number: 5990513
    Abstract: A yield enhancement technique for integrated circuit processing which reduces the deleterious effects of H.sub.2 O contamination which is absorbed by conventional dielectric films resulting in an undesired subsequent out-diffusion of hydrogen when the integrated circuit die is subsequently subjected to relatively high processing temperatures such as those experienced in CERDIP packaging. The technique disclosed comprises the formation of an interlevel dielectric layer having hydrophilic properties (for example, 7.5% phosphorus doped TEOS) at least partially surrounding a device on the integrated circuit which layer is then subjected to an annealing operation to drive off at least a portion of any moisture present therein.
    Type: Grant
    Filed: October 8, 1996
    Date of Patent: November 23, 1999
    Assignee: Ramtron International Corporation
    Inventors: Stanley C. Perino, Sanjay Mitra, George Argos, Jr., Holli Harper