Abstract: A method for forming feedthrough connections, or via studs, between levels of metallization which are typically formed atop semiconductor substrates. A conductive pattern is formed which includes the first level metallurgy, an etch barrier and the feedthrough metallurgy in the desired first level metallurgical configuration. The via stud metallurgy alone is then patterned, preferably by reactive ion etching, using the etch barrier to prevent etching of the first level metallurgy. An insulator is then deposited around the via studs to form a planar layer of studs and insulator, after which a second level of metallization may be deposited.

Abstract: In the fabrication of Schottky barrier diodes, in conjunction with active devices such as transistors, it has become the conventional practice to use reactive ion etching (RIE) to remove a protective layer of Si.sub.3 N.sub.4. This step of etching is used in forming the anode regions of the Schottky barrier diodes, as well as the active device regions of the transistors. It has been discovered by the present inventors that "resistive shorts" which have been produced in this context--thus ruining the Schottky barrier function--result from the fact that pinholes in the underlying oxide insulating layer permit the reactant gas to etch all the way down to the silicon substrate so as to produce diffusion paths or "pipes" through the oxide. Accordingly, instead of the oxide layer acting to block diffusion in the Schottky anode areas, these diffusion paths permit the resistive shorts to be formed. The present invention involves the use of a low energy collimated ion beam in an inert atmosphere, e.g.

Abstract: A method for eliminating deposited residues, for example polysilicon residue, on vertical silicon dioxide sidewalls that have been reactive ion etched includes reshaping the sidewalls to have a slope of at least +30.degree. relative to the vertical direction of the sidewall.

Abstract: Metals such as platinum and palladium are preferentially removed in the presence of their metal silicides by ion milling in a noble gas atmosphere such as argon. The process can be used on semiconductor chips to remove excess platinum after platinum silicide has been formed in the contact holes.

Abstract: A sputtering system adapted for depositing quartz in uniform thicknesses upon multiple wafers processed in batches including an anode plate having a plurality of wafer locations spaced from the center of the anode, with each wafer location comprising a wafer receiving recess in the anode plate having an angular bottom slope which, in effect, tilts the wafer to an optimum deposition angle with respect to the cathode, depending upon wafer spacing from the center of the anode, to insure uniform deposition across the wafer.

Abstract: In the fabrication of integrated circuits, step or ridge peak problems in forming via openings through sputtered quartz coatings to underlying metallization are minimized by subdividing the contact portions thereof into a plurality of adjacent line segments, and forming the via opening between the elevations or peaks on the line segments to expose portions thereof for interconnection by higher metallization levels.