Abstract: Systems and methods for implementing Advanced Encryption Standard (AES) are disclosed herein. Aspects of the method may comprise storing 256 bytes of data. A non-zero byte portion of the 256 bytes of data may be replaced with multiplicative inverse bytes in a Galois field GF(256) and the replaced inverse bytes may be affine transformed over GF (2). The affine transformed bytes may be affine inverse transformed, and the affine inverse transformed bytes may be multiplicatively inversed over GF(256). The affine transformation over GF(2) may be determined as a matrix multiplication and addition of (1 1 0 0 0 1 1 0). If the 256 bytes comprise a zero byte, the zero byte from the 256 bytes of data may be mapped to the zero byte portion of the 256 bytes of data.

Abstract: Methods and systems for on-chip processing of data are disclosed. Aspects of the method may include generating a plurality of data processing commands for data compression. A first string of characters may be encoded in one operating cycle utilizing the generated plurality of data processing commands for data compression. The plurality of data processing commands may comprise a branch command, a register moving command, a register setting command, a memory load command, a memory store command, and/or a register compare command. The generated plurality of data processing commands may be stored. At least a portion of the stored data processing commands may be decoded. The decoded portion of the stored data processing commands may be sequenced. The first string of characters may be acquired from a character space. The acquired first string of characters may be matched with at least one existing codeword.

Abstract: Systems and methods for accelerating AES encryption and decryption operations are provided. Aspects of the method may include time multiplexing a plurality of substitution boxes (S-boxes) for instantaneous key generation and byte substitution operations. Bytes may be substituted in at least a portion of a current security key information and at least a portion of a subsequent security key information within said plurality of S-boxes. The current security key may comprise 128 bits, 192 bits or 256 bits and the portion of the current security key may comprise 32 bits. The substituted portion of the security key information may be communicated to a key generator. The subsequent security key information may be generated utilizing the substituted portion of the current security key information. The current security key information may then be stored.