Patents by Inventor Hon-Sum Phillip Wong

Hon-Sum Phillip Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Field-enhanced programmable resistance memory cell
    Patent number: 8377789
    Abstract: A method for fabricating a field-enhanced programmable resistance memory cell. In an example embodiment, a resistor includes a resistance structure between a first electrode and a second electrode. The resistance structure includes an insulating dielectric material. The second electrode includes a protrusion extending into the resistance structure. The insulating dielectric material includes a material in which a confined conductive region with a programmable resistance is formable via a conditioning signal.
    Type: Grant
    Filed: August 9, 2009
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Gerhard Ingmar Meijer, Chung Hon Lam, Hon-Sum Phillip Wong
  • Field-enhanced programmable resistance memory cell
    Patent number: 7791141
    Abstract: Provides a field-enhanced programmable resistance memory cell. In an example embodiment, a resistor includes a resistance structure between a first electrode and a second electrode. The resistance structure includes an insulating dielectric material. The second electrode includes a protrusion extending into the resistance structure. The insulating dielectric material includes a material in which a confined conductive region with a programmable resistance is formable via a conditioning signal.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventors: Gerhard Ingmar Meijer, Chung Hon Lam, Hon-Sum Phillip Wong
  • FIELD-ENHANCED PROGRAMMABLE RESISTANCE MEMORY CELL
    Publication number: 20090298252
    Abstract: A method for fabricating a field-enhanced programmable resistance memory cell. In an example embodiment, a resistor includes a resistance structure between a first electrode and a second electrode. The resistance structure includes an insulating dielectric material. The second electrode includes a protrusion extending into the resistance structure. The insulating dielectric material includes a material in which a confined conductive region with a programmable resistance is formable via a conditioning signal.
    Type: Application
    Filed: August 9, 2009
    Publication date: December 3, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gerhard Ingmar Meijer, Chung Hon Lam, Hon-Sum Phillip Wong
  • Damascene double-gate FET
    Patent number: 6762101
    Abstract: A double-gate field effect transistor (DGFET) is provided using a damascene-like replacement gate processing step to create sidewall source/drain regions, oxide spacers and gate structures inside a previously formed trench. The damascene-like replacement gate processing step allows for the fabrication of a tapered transistor body region having a thicker body under the contacts which reduces access resistance.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: July 13, 2004
    Assignee: International Business Machines Corporation
    Inventors: Kevin K. Chan, Erin C. Jones, Paul M. Solomon, Hon-Sum Phillip Wong
  • Damascene double-gate FET
    Publication number: 20030193070
    Abstract: A double-gate field effect transistor (DGFET) is provided using a damascene-like replacement gate processing step to create sidewall source/drain regions, oxide spacers and gate structures inside a previously formed trench. The damascene-like replacement gate processing step allows for the fabrication of a tapered transistor body region having a thicker body under the contacts which reduces access resistance.
    Type: Application
    Filed: April 11, 2003
    Publication date: October 16, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin K. Chan, Erin C. Jones, Paul M. Solomon, Hon-Sum Phillip Wong
  • Damascene double-gate FET
    Patent number: 6580132
    Abstract: A double-gate field effect transistor (DGFET) is provided using a damascene-like replacement gate processing step to create sidewall source/drain regions, oxide spacers and gate structures inside a previously formed trench. The damascene-like replacement gate processing step allows for the fabrication of a tapered transistor body region having a thicker body under the contacts which reduces access resistance.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: June 17, 2003
    Assignee: International Business Machines Corporation
    Inventors: Kevin K. Chan, Erin C. Jones, Paul M. Solomon, Hon-Sum Phillip Wong