Abstract: A positive electrode active material precursor having a uniform particle size distribution and represented by Formula 1, wherein a percentage of fine powder with an average particle diameter (D50) of 1 ?m or less is generated when the positive electrode active material precursor is rolled at 2.5 kgf/cm2 is less than 1%, and an aspect ratio is 0.93 or more, and a method of preparing the positive electrode active material precursor [NixCoyM1zM2w](OH)2 ??[Formula 1] in Formula 1, 0.5?x<1, 0<y?0.5, 0<z?0.5, and 0?w?0.1, M1 includes at least one selected from the group consisting of Mn and Al, and M2 includes at least one selected from the group consisting of Zr, B, W, Mo, Cr, Nb, Mg, Hf, Ta, La, Ti, Sr, Ba, Ce, F, P, S, and Y. A method of preparing the positive electrode active material precursor is also provided.

Abstract: A method of forming a semiconductor device with a SEG layer and isolating elements formed in the device includes forming an insulating layer for isolating elements on a silicon substrate. An open area is formed in the insulating layer to expose the surface of the silicon substrate by selectively etching the insulating layer. The open area in the insulating layer includes an inclined side wall at a positive angle of inclination. An epitaxial layer is selectively grown to have a top surface lower than the surface of the insulating layer, using the silicon exposed in the open area as a seed. A sacrificial oxide layer is formed on the surface of the silicon of the epitaxial growth, and the sacrificial oxide layer is then removed.

Abstract: A method of forming a pattern for a semiconductor device without using a photolithography technique is disclosed, wherein the method includes forming a sacrificial layer on a semiconductor substrate, forming a sacrificial layer pattern by patterning the sacrificial layer, forming a conformal layer on a resultant structure after forming the sacrificial layer pattern, and forming the layer pattern by anisotropically etching the conformal layer.

Abstract: A method of forming a pattern for a semiconductor device without using a photolithography technique is disclosed, wherein the method includes forming a sacrificial layer on a semiconductor substrate, forming a sacrificial layer pattern by patterning the sacrificial layer, forming a conformal layer on a resultant structure after forming the sacrificial layer pattern, and forming the layer pattern by anisotropically etching the conformal layer.

Abstract: A method of forming a semiconductor device with a SEG layer and isolating elements formed in the device includes forming an insulating layer for isolating elements on a silicon substrate. An open area is formed in the insulating layer to expose the surface of the silicon substrate by selectively etching the insulating layer. The open area in the insulating layer includes an inclined side wall at a positive angle of inclination. An epitaxial layer is selectively grown to have a top surface lower than the surface of the insulating layer, using the silicon exposed in the open area as a seed. A sacrificial oxide layer is formed on the surface of the silicon of the epitaxial growth, and the sacrificial oxide layer is then removed.

Abstract: A method for precisely monitoring defects on a semiconductor device includes inserting, into a predetermined region of a photomask used for manufacturing a semiconductor device on a semiconductor wafer, a reference defect pattern with a predetermined distribution of defects with varying sizes. Then the method involves forming reference defects on the semiconductor wafer using the photomask having the reference defect pattern. Next, control settings of a defect detection device are selected such that an output distribution of defects most closely matches the predetermined distribution of defects. Finally, defects in an integrated circuit chip region of the semiconductor wafer are monitored with the defect detection device, using the control settings selected during the selecting step.

Abstract: Scrubbing equipment for semiconductor devices includes an automatic brush-height adjustment device for automatically adjusting the height of a brush over a wafer surface so that eddy currents are produced in a layer of water on the wafer and minute particles are cleaned from the wafer without damaging the wafer surface. The brush-height adjustment device uses a distance sensor which measures the distance between the tip of the brush and the top of the wafer using laser pulses and then controls up-and-down movement of the shaft upon which the brush is mounted based upon that distance.

Abstract: A wafer testing process of a semiconductor device provided with a redundancy circuit. The process comprises a step of removing a passivation film above a pad and link portion, pre-laser testing, laser-repairing, and final quality marking using an off-line inking method. Therefore, fabrication-test processes are simplified to one step by adopting the off-line inking method, thereby achieving productivity improvement, quality enhancement, and reduction of throughput time.