Patents by Inventor Hong Change

Hong Change has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250240452
    Abstract: An image encoding method according to the present disclosure may include deriving coefficients of a spherical harmonic function for a plurality of vertices on a three-dimensional space; generating a plurality of layer images based on the coefficients; and encoding the plurality of layer images. In this case, each of the plurality of layer images may include a coefficient value in order corresponding to the spherical harmonic function.
    Type: Application
    Filed: January 16, 2025
    Publication date: July 24, 2025
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Hong Chang SHIN, Gwangsoon LEE
  • Publication number: 20250231237
    Abstract: The electronic device includes a first chip and a second chip. The first chip includes a first master slave recognition pin coupled to a master voltage, a first access detection pin coupled to a first voltage, and a first interface pin coupled to a memory. The second chip includes a second master slave recognition pin, a second access detection pin coupled to the first access detection pin, and a second interface pin coupled to the first interface pin and the memory. When the first chip is activated, the first chip enters an idle state. When the first chip stays in the idle state for more than a predetermined idle time and the first access detection pin remains at the first voltage, the first chip enters an access state.
    Type: Application
    Filed: December 9, 2024
    Publication date: July 17, 2025
    Inventors: JIA LIN MEI, HONG CHANG
  • Publication number: 20250234581
    Abstract: A method of manufacturing a semiconductor device includes at least the following steps. An opening is formed in a substrate. A first protection layer is formed on an exposed surface of the opening. A first etching process is performed on the opening with the first protection layer thereon, to simultaneously remove the first protection layer on a sidewall of the opening and a portion of the substrate to deepen a depth of the opening.
    Type: Application
    Filed: April 6, 2025
    Publication date: July 17, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Ming Kuo, Hsin-Chih Chen, Che-Yuan Hsu, Kuo-Chin Liu, Han-Yu Tsai, You-Ting Lin, Jen-Hong Chang
  • Patent number: 12349381
    Abstract: Semiconductor structures and methods of forming the same are provided. A method according to the present disclosure includes forming a stack of epitaxial layers over a substrate, forming a first fin-like structure and a second fin-like structure from the stack, forming an isolation feature between the first fin-like structure and the second fin-like structure, forming a cladding layer over the first fin-like structure and the second fin-like structure, conformally depositing a first dielectric layer over the cladding layer, depositing a second dielectric layer over the first dielectric layer, planarizing the first dielectric layer and the second dielectric layer until the cladding layer are exposed, performing an etch process to etch the second dielectric layer to form a helmet recess, performing a trimming process to trim the first dielectric layer to widen the helmet recess, and depositing a helmet feature in the widened helmet recess.
    Type: Grant
    Filed: January 29, 2024
    Date of Patent: July 1, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jen-Hong Chang, Yuan-Ching Peng, Chung-Ting Ko, Kuo-Yi Chao, Chia-Cheng Chao, You-Ting Lin, Chih-Chung Chang, Yi-Hsiu Liu, Jiun-Ming Kuo, Sung-En Lin
  • Patent number: 12341943
    Abstract: Disclosed herein are an apparatus and method for removing redundant data between multi-view videos. The method includes generating a pruning mask of an additional view image by mapping a basic view image to the additional view image, among multi-view images, and revalidating the pruning mask using color information of the basic view image and the additional view image. Revalidating the pruning mask may include defining a color relationship between the basic view image and the additional view image by extracting predetermined sample values from corresponding pixels between the basic view image and the additional view image, which are included in the pruning candidate group of the pruning mask, and detecting pixels that do not match the defined color relationship, among the pixels in the pruning mask, as outliers.
    Type: Grant
    Filed: October 7, 2022
    Date of Patent: June 24, 2025
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hong-Chang Shin, Gwang-Soon Lee
  • Publication number: 20250192625
    Abstract: An axial-flux motor includes: a shaft; a rotor assembly; a first stator assembly disposed on one side of the rotor assembly in an axial direction, wherein the first stator assembly includes a first base, and the first base is provided with first through holes; a second stator assembly, disposed on an other side of the rotor assembly in the axial direction, wherein the rotor assembly is located in a rotor space formed between the first stator assembly and the second stator assembly; and a wind scooper, fixed to the first base and provided with air inlets, wherein the air inlets are bell-shaped holes with a width decreasing from outside to inside, and the air inlets are communicated with the first through holes of the first base, so that an external airflow enters the axial-flux motor through the air inlets and the first through holes.
    Type: Application
    Filed: December 6, 2023
    Publication date: June 12, 2025
    Inventors: Chin-Hong CHANG, Fu-Chuan HSU, Jui-Ming HUA, Chorng-Tyan LIN, Pin-Jyun CHEN, Yu-Lin CHI
  • Patent number: 12294684
    Abstract: Disclosed herein is a method for encoding an immersive image. The method includes detecting a non-diffuse surface in a first texture image of a first view, generating an additional texture image from the first texture image based on the detected non-diffuse surface, performing pruning on the additional texture image based on a second texture image of a second view, generating a texture atlas based on the pruned additional texture image, and encoding the texture atlas.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: May 6, 2025
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Gwang-Soon Lee, Hong-Chang Shin, Jun-Young Jeong
  • Patent number: 12294028
    Abstract: A method of manufacturing a semiconductor device includes at least the following steps. A protrusion is formed in a substrate by an anisotropic etch process, wherein a sidewall of the protrusion is inclined. A recess is formed on the sidewall of the protrusion by an isotropic etch process, wherein during the isotropic etch process, a by-product covers a first portion of the sidewall of the protrusion while exposing a second portion of the sidewall of the protrusion, so that the recess is formed between the first portion and the second portion of the sidewall.
    Type: Grant
    Filed: October 25, 2023
    Date of Patent: May 6, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Ming Kuo, Hsin-Chih Chen, Che-Yuan Hsu, Kuo-Chin Liu, Han-Yu Tsai, You-Ting Lin, Jen-Hong Chang
  • Publication number: 20250118559
    Abstract: A method includes forming a semiconductor substrate, forming hard mask layers (HMs) over the semiconductor substrate, forming first mandrels over the HMs, forming second mandrels along sidewalls of the first mandrels, forming a protective layer over the first mandrels and the second mandrels, removing a portion of the protective layer to expose portions of the first and the second mandrels, removing the exposed portions of the second mandrels with respect to the exposed portions of the first mandrels, removing remaining portions of the protective layer to expose remaining portions of the first and second mandrels, where the exposed portions of the first mandrels and the remaining portions of the first and second mandrels form a mandrel structure, patterning the HMs using the mandrel structure as an etching mask, and patterning the semiconductor substrate to form a fin structure using the patterned HMs as an etching mask.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Inventors: Jen-Hong Chang, Yuan-Ching Peng, Jiun-Ming Kuo, Kuo-Yi Chao, Chih-Chung Chang, You-Ting Lin, Yen-Po Lin, Chen-Hsuan Liao
  • Publication number: 20250097460
    Abstract: An image encoding method according to the present disclosure may include generating an atlas based on a plurality of viewpoint images; encoding the atlas; and encoding metadata for the atlas. In this case, the metadata may include data of a patch packed in the atlas, and the patch data may include type information of an entity corresponding to a patch.
    Type: Application
    Filed: September 13, 2024
    Publication date: March 20, 2025
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kwan-Jung OH, Gwangsoon LEE, Hong-Chang SHIN, Jun-Young JEONG
  • Publication number: 20250056851
    Abstract: A semiconductor device includes a first channel region, a second channel region, and a first insulating fin, the first insulating fin being interposed between the first channel region and the second channel region. The first insulating fin includes a lower portion and an upper portion. The lower portion includes a fill material. The upper portion includes a first dielectric layer on the lower portion, the first dielectric layer being a first dielectric material, a first capping layer on the first dielectric layer, the first capping layer being a second dielectric material, the second dielectric material being different than the first dielectric material, and a second dielectric layer on the first capping layer, the second dielectric layer being the first dielectric material.
    Type: Application
    Filed: October 28, 2024
    Publication date: February 13, 2025
    Inventors: Jen-Hong Chang, Yi-Hsiu Liu, You-Ting Lin, Chih-Chung Chang, Kuo-Yi Chao, Jiun-Ming Kuo, Yuan-Ching Peng, Sung-En Lin, Chia-Cheng Chao, Chung-Ting Ko
  • Patent number: 12219206
    Abstract: An analysis method configured to analyze original signals on an auxiliary channel of DisplayPort between a transmitter and at least one receiver, includes: receiving a first original signal of the original signals; dividing the first original signal to obtain a DPCD address and a first data; storing the first data according to the DPCD address; determining whether the first data is a redundant signal; when the first data is not the redundant signal, analyzing the first data; and displaying a topology of the at least one receiver. The operation of analyzing the first data includes generating the topology of the at least one receiver.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: February 4, 2025
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hao Zhou, Hong Chang, Xin Sheng Yang, Tao Xu
  • Patent number: 12212779
    Abstract: A method of processing an immersive video includes classifying view images into a basic image and an additional image, performing pruning with respect to view images by referring to a result of classification, generating atlases based on a result of pruning, generating a merged atlas by merging the atlases into one atlas, and generating configuration information of the merged atlas.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: January 28, 2025
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jun Young Jeong, Kug Jin Yun, Gwang Soon Lee, Hong Chang Shin, Ho Min Eum
  • Publication number: 20250024075
    Abstract: An image encoding method according to the present disclosure may include generating an atlas based on at least one two-dimensional or three-dimensional image; and encoding the atlas and metadata for the atlas. In this case, the metadata may include information about a patch packed in the atlas, and the patch information may include information about a three-dimensional point projected on a two-dimensional patch.
    Type: Application
    Filed: July 12, 2024
    Publication date: January 16, 2025
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Hong Chang SHIN, Gwang Soon LEE
  • Patent number: 12176212
    Abstract: A method includes forming a semiconductor substrate, forming hard mask layers (HMs) over the semiconductor substrate, forming first mandrels over the HMs, forming second mandrels along sidewalls of the first mandrels, forming a protective layer over the first mandrels and the second mandrels, removing a portion of the protective layer to expose portions of the first and the second mandrels, removing the exposed portions of the second mandrels with respect to the exposed portions of the first mandrels, removing remaining portions of the protective layer to expose remaining portions of the first and second mandrels, where the exposed portions of the first mandrels and the remaining portions of the first and second mandrels form a mandrel structure, patterning the HMs using the mandrel structure as an etching mask, and patterning the semiconductor substrate to form a fin structure using the patterned HMs as an etching mask.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: December 24, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jen-Hong Chang, Yuan-Ching Peng, Jiun-Ming Kuo, Kuo-Yi Chao, Chih-Chung Chang, You-Ting Lin, Yen-Po Lin, Chen-Hsuan Liao
  • Patent number: 12166076
    Abstract: A semiconductor device includes a first channel region, a second channel region, and a first insulating fin, the first insulating fin being interposed between the first channel region and the second channel region. The first insulating fin includes a lower portion and an upper portion. The lower portion includes a fill material. The upper portion includes a first dielectric layer on the lower portion, the first dielectric layer being a first dielectric material, a first capping layer on the first dielectric layer, the first capping layer being a second dielectric material, the second dielectric material being different than the first dielectric material, and a second dielectric layer on the first capping layer, the second dielectric layer being the first dielectric material.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: December 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jen-Hong Chang, Yi-Hsiu Liu, You-Ting Lin, Chih-Chung Chang, Kuo-Yi Chao, Jiun-Ming Kuo, Yuan-Ching Peng, Sung-En Lin, Chia-Cheng Chao, Chung-Ting Ko
  • Patent number: 12159908
    Abstract: A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer, a gate structure, and a field plate. The second nitride semiconductor layer is formed on a first surface of the first nitride semiconductor layer. The gate structure is disposed on the second nitride semiconductor layer. The field plate includes a first portion and a second portion connected to the first portion. The first portion has a first surface substantially in parallel to the first surface of the first nitride semiconductor layer, and a second surface adjacent to the first surface of the first portion. The first surface of the first portion of the field plate and the second surface of the first portion of the field plate define a first angle of about 90°.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: December 3, 2024
    Assignee: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
    Inventors: Chao Wang, Ming-Hong Chang
  • Publication number: 20240371959
    Abstract: A method includes forming a first fin structure and a second fin structure protruding from a substrate, forming a dielectric fin between the first fin structure and the second fin structure, recessing the dielectric fin to form a trench between the first fin structure and the second fin structure, and depositing a first dielectric layer on sidewall surfaces of the trench and on a top surface of the recessed dielectric fin. After the depositing the first dielectric layer, a second dielectric layer is deposited in the trench. The method further includes depositing a third dielectric layer to cap the second dielectric layer in the trench, and forming a gate structure on the first fin structure, the second fin structure, and the third dielectric layer.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Inventors: Chih-Chung Chang, Sung-En Lin, Chung-Ting Ko, You-Ting Lin, Yi-Hsiu Liu, Po-Wei Liang, Jiun-Ming Kuo, Yung-Cheng Lu, Chi On Chui, Yuan-Ching Peng, Jen-Hong Chang
  • Patent number: 12113113
    Abstract: A semiconductor device includes a pair of fin structures on a semiconductor substrate, each including a vertically stacked plurality of channel layers, a dielectric fin extending in parallel to and between the fin structures, and a gate structure on and extending perpendicularly to the fin structures, the gate structure engaging with the plurality of channel layers. The dielectric fin includes a fin bottom and a fin top over the fin bottom. The fin bottom has a top surface extending above a bottom surface of a topmost channel layer. The fin top includes a core and a shell, the core having a first dielectric material, the shell surrounding the core and having a second dielectric material different from the first dielectric material.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: October 8, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Chung Chang, Sung-En Lin, Chung-Ting Ko, You-Ting Lin, Yi-Hsiu Liu, Po-Wei Liang, Jiun-Ming Kuo, Yung-Cheng Lu, Chi On Chui, Yuan-Ching Peng, Jen-Hong Chang
  • Publication number: 20240332380
    Abstract: Some embodiments of the disclosure provide a method for fabricating a semiconductor device. The method comprises: providing a semiconductor stack comprising a substrate, a first nitride semiconductor layer on the substrate, and a second nitride semiconductor layer on the first nitride semiconductor layer, wherein the second nitride semiconductor layer having a bandgap greater than that of the first nitride semiconductor layer; forming a first contact on the first nitride semiconductor layer; forming a spacer attached to a sidewall of the first contact; and forming a second contact after the spacer is formed.
    Type: Application
    Filed: June 4, 2024
    Publication date: October 3, 2024
    Applicant: INNOSCIENCE (SUZHOU) SEMICONDUCTOR CO., LTD.
    Inventors: Ming-Hong Chang, Jian RAO, Yulong ZHANG