Patents by Inventor Hong-Chih Chen

Hong-Chih Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105786
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a first source/drain (S/D) region disposed over a substrate, a second S/D region disposed over the substrate, a dielectric wall disposed between the first and second S/D regions, a first conductive contact disposed over and electrically connected to the first S/D region, a second conductive contact disposed over and electrically connected to the second S/D region, and a first dielectric material in contact with the dielectric wall. The first dielectric material has a top surface located at a first level between a top surface of the first conductive contact and a bottom surface of the first conductive contact, and the first dielectric material extends from the first level to a second level located below the bottom surface of the first conductive contact.
    Type: Application
    Filed: January 15, 2023
    Publication date: March 28, 2024
    Inventors: Chun-Sheng LIANG, Hong-Chih CHEN
  • Publication number: 20240105805
    Abstract: Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes channel structures vertically stacked over a substrate and a source/drain structure laterally attached to the channel structures in the first direction. The semiconductor structure also includes a dielectric wall structure laterally attached to the channel structures in the second direction. The second direction is different from the first direction. In addition, the dielectric wall structure includes a bottom portion and a cap layer formed over the bottom portion. The semiconductor structure also includes an isolation feature vertically overlapping the cap layer of the dielectric wall structure and a gate structure formed around the channel structures and covering a sidewall of the isolation feature.
    Type: Application
    Filed: February 2, 2023
    Publication date: March 28, 2024
    Inventors: Chun-Sheng LIANG, Hong-Chih CHEN, Ta-Chun LIN, Shih-Hsun CHANG, Chih-Hao CHANG
  • Publication number: 20240074267
    Abstract: Disclosed is an electronic device having a display region and a peripheral region adjacent to the display region. The electronic device includes a first electrode disposed in the display region, a second electrode disposed in the display region, a circuit module disposed in the peripheral region, a first electrical trace, and a second electrical trace electrically insulated from the first electrical trace. The circuit module is electrically connected to the first electrode through the first electrical trace and provides a first driving voltage to the first electrical trace. The circuit module is electrically connected to the second electrode through the second electrical trace and provides a second driving voltage to the second electrical trace, and the first driving voltage is different from the second driving voltage. In a top view, the first electrical trace at least partially overlaps the second electrical trace.
    Type: Application
    Filed: November 8, 2023
    Publication date: February 29, 2024
    Applicant: InnoLux Corporation
    Inventors: Shu-Hui Yang, Chien-Chih Chen, Ming-Che Chiang, Hong-Pin Ko
  • Publication number: 20230420505
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes first and second gate structures formed over a semiconductor substrate and a multilayer gate isolation structure separating the first gate structure from the second gate structure. The multilayer gate isolation structure includes a first insulating feature adjacent to upper portions of the first gate structure and the second gate structure, and a second insulating feature separating the semiconductor substrate from the first insulating feature. The material of the second insulating feature is different than that of the first insulating feature. The second insulating feature has a lower dielectric constant or lower etch resistance than the first insulating feature.
    Type: Application
    Filed: June 22, 2022
    Publication date: December 28, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hong-Chih CHEN, Wei-Chih KAO, Chun-Yi CHANG, Yu-San CHIEN, Hsin-Che CHIANG, Chun-Sheng LIANG
  • Publication number: 20230411497
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first gate stack over a substrate. The first gate stack includes a first gate electrode and a dielectric layer between the first gate electrode and the substrate, and the first gate electrode has a void. The method includes oxidizing a side portion of the first gate electrode to form an oxide layer over the first gate electrode. The oxide layer fills the void.
    Type: Application
    Filed: June 17, 2022
    Publication date: December 21, 2023
    Inventors: Chun-Yi CHANG, Hsiao-Chu CHEN, Hong-Chih CHEN, Hsin-Che CHIANG, Chun-Sheng LIANG, Kuo-Hua PAN
  • Patent number: 11698309
    Abstract: The disclosure relates to a linear actuator including a base, a linear motor, a load cell and a rotary motor. The linear motor is disposed on the base and includes a fixed coil module and a movable magnetic backplane. The fixed coil module is fixed on the base, and the movable magnetic backplane is configured to slide relative to the fixed coil module along a first direction. The rotary motor is rotated around a central axis in parallel with the first direction. The load cell has two opposite sides parallel to the first direction, respectively. The movable magnetic backplane of the linear motor and the rotary motor are connected to the two opposite sides of the load cell, respectively. The load cell is subjected to a force applied thereto by the rotary motor and parallel to the first direction, and configured to convert the force into an electrical signal.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: July 11, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yu-Han Hsu, Zi-Xuan Huang, Yu-Xian Huang, Yi-Min Liang, You-Chyau Tsai, Tsung-En Chan, Hong-Chih Chen
  • Publication number: 20220157978
    Abstract: A p-GaN high electron mobility transistor is disclosed. The p-GaN high electron mobility transistor includes a substrate, a channel layer located on the substrate, a supply layer laminated on the channel layer, and a doped layer laminated on the supply layer. A doping concentration of the doped layer is gradually distributed, in which the doping concentration in a first doped region close to the supply layer is lower than a doping concentration in a second doped region distant from the supply layer. A gate electrode is located on the doped layer. A source electrode and a drain electrode are respectively electrically connected to the channel layer and the supply layer.
    Type: Application
    Filed: November 26, 2020
    Publication date: May 19, 2022
    Inventors: Ting-Chang Chang, Hong-Chih Chen, Hao-Xuan Zheng, Yu-Shan Lin, Fu-Yuan Jin, Fong-Min Ciou, Yun-Hsuan Lin, Mao-Chou Tai, Wen-Chung Chen
  • Publication number: 20220123136
    Abstract: A GaN high electron mobility transistor is disclosed. The GaN high electron mobility transistor includes a substrate, a buffer layer located on the substrate, a barrier layer laminated on the buffer layer, a channel layer laminated on the barrier layer, a supply layer laminated on the channel layer. The barrier layer has either a p-type semiconductor or a wide band gap material. A gate electrode is located on the supply layer. A source electrode and a drain electrode are electrically connected to the channel layer and the supply layer.
    Type: Application
    Filed: March 15, 2021
    Publication date: April 21, 2022
    Inventors: Ting-Chang Chang, Hong-Chih Chen, Hao-Xuan Zheng, Yu-Shan Lin, Fu-Yuan Jin, Fong-Min Ciou, Yun-Hsuan Lin, Mao-Chou Tai, Wen-Chung Chen
  • Publication number: 20220037531
    Abstract: A thin film transistor is used to solve a problem of low process efficiency of the conventional thin film transistor in preventing hydrogen diffusion. The thin film transistor includes a substrate, multilayer thin films laminated on the substrate, and at least one fluorine-containing thin film laminated in substitution for the multilayer thin films. Each of the multilayer thin films is a gate insulating layer, an active layer, a buffer layer, and a dielectric layer or a protective layer. Each of the at least one fluorine-containing thin film is a fluorine-doped insulating layer, a fluorine-doped active layer, a fluorine-doped buffer layer, and a fluorine-doped dielectric layer or a fluorine-doped protective layer. The invention further discloses a method for manufacturing the thin film transistor.
    Type: Application
    Filed: September 11, 2020
    Publication date: February 3, 2022
    Inventors: Ting-Chang Chang, Yu-Lin Tsai, Yu-Ching Tsao, Hong-Chih Chen, Shin-Ping Huang, Mao-Chou Tai, Po-Hsun Chen
  • Publication number: 20210281157
    Abstract: The disclosure relates to a linear actuator including a base, a linear motor, a load cell and a rotary motor. The linear motor is disposed on the base and includes a fixed coil module and a movable magnetic backplane. The fixed coil module is fixed on the base, and the movable magnetic backplane is configured to slide relative to the fixed coil module along a first direction. The rotary motor is rotated around a central axis in parallel with the first direction. The load cell has two opposite sides parallel to the first direction, respectively. The movable magnetic backplane of the linear motor and the rotary motor are connected to the two opposite sides of the load cell, respectively. The load cell is subjected to a force applied thereto by the rotary motor and parallel to the first direction, and configured to convert the force into an electrical signal.
    Type: Application
    Filed: December 10, 2020
    Publication date: September 9, 2021
    Inventors: Yu-Han Hsu, Zi-Xuan Huang, Yu-Xian Huang, Yi-Min Liang, You-Chyau Tsai, Tsung-En Chan, Hong-Chih Chen
  • Publication number: 20020135489
    Abstract: An automatic diaper wetness warning device includes a diaper, a wetness signal transmitting device and an externally disposed signal receiver. The diaper is provided with a wetness signal transmitting device including a signal transmitting and a positive and negative pole sensing electric wire assembly. A suitable length of the inner end of the wire assembly is provided with an insulation coating material that can conduct electricity when wet, and is wound into a signal actuating section embedded in the diaper in a position that can readily absorb urine. When the insulation coating material of the signal actuating section is wet and becomes short circuit, the signal transmitter will automatically generate a signal, which is received by the signal receiver. The signal receiver sends a suitable warning to remind a person taking care of the user of the diaper to change diaper.
    Type: Application
    Filed: February 1, 2002
    Publication date: September 26, 2002
    Inventors: Chin-Chen Chen, Hong-Lin Chen, Hong-Ming Chen, Yi-Ran Chen, Hong-Chih Chen