Patents by Inventor HONGGANG DAI

HONGGANG DAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • EEPROM device
    Patent number: 10483269
    Abstract: A semiconductor device includes a semiconductor substrate, a first dielectric layer having a first thickness on the semiconductor substrate, a first opening having a first width in the first dielectric layer, a second dielectric layer having a second thickness disposed in a middle region of the first opening, and a third dielectric layer having a first portion and a second portion disposed on opposite sides of second dielectric layer. The first portion and the second portion have a second width smaller than the first width, and the third dielectric layer has a third thickness smaller than the first thickness and the second thickness.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: November 19, 2019
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Peng Huang, Jun Li, Honggang Dai, Guanguan Gu
  • EEPROM DEVICE
    Publication number: 20180366480
    Abstract: A semiconductor device includes a semiconductor substrate, a first dielectric layer having a first thickness on the semiconductor substrate, a first opening having a first width in the first dielectric layer, a second dielectric layer having a second thickness disposed in a middle region of the first opening, and a third dielectric layer having a first portion and a second portion disposed on opposite sides of second dielectric layer. The first portion and the second portion have a second width smaller than the first width, and the third dielectric layer has a third thickness smaller than the first thickness and the second thickness.
    Type: Application
    Filed: August 14, 2018
    Publication date: December 20, 2018
    Applicants: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Peng Huang, Jun Li, Honggang Dai, Guanguan Gu
  • Method of manufacturing an EEPROM device
    Patent number: 10079241
    Abstract: A method for manufacturing a semiconductor device includes providing a semiconductor substrate, forming a first dielectric layer having a first thickness on the semiconductor substrate, forming a first opening having a first width in the first dielectric layer and exposing a surface of the semiconductor substrate, forming a spacer on opposite sidewalls of the first opening, forming a second dielectric layer having a second thickness on the exposed surface of the semiconductor substrate in a middle region of the first opening, removing the spacer to form a second opening having a first opening portion and a second opening portion on opposite sides of the second dielectric layer, and forming a third dielectric layer having a third thickness on the first and second opening portions of the second opening. The third thickness is smaller than the first thickness and the second thickness.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: September 18, 2018
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Peng Huang, Jun Li, Honggang Dai, Guanguan Gu
  • METHOD OF MANUFACTURING AN EEPROM DEVICE
    Publication number: 20170200728
    Abstract: A method for manufacturing a semiconductor device includes providing a semiconductor substrate, forming a first dielectric layer having a first thickness on the semiconductor substrate, forming a first opening having a first width in the first dielectric layer and exposing a surface of the semiconductor substrate, forming a spacer on opposite sidewalls of the first opening, forming a second dielectric layer having a second thickness on the exposed surface of the semiconductor substrate in a middle region of the first opening, removing the spacer to form a second opening having a first opening portion and a second opening portion on opposite sides of the second dielectric layer, and forming a third dielectric layer having a third thickness on the first and second opening portions of the second opening. The third thickness is smaller than the first thickness and the second thickness.
    Type: Application
    Filed: November 28, 2016
    Publication date: July 13, 2017
    Inventors: PENG HUANG, Jun Li, HONGGANG DAI, GUANGUAN GU