Abstract: Described is a chip comprising: a pull-up driver with a first impedance, the pull-up driver coupled to a node; a pull-down driver with a second impedance, the pull-down driver coupled to the node; and an equalizer coupled to the pull-up and pull-down drivers, wherein the equalizer is operable to be trained to deemphasize a signal driven on the node while maintaining the first and second impedances substantially constant.

Abstract: Described is a chip comprising: a pull-up driver with a first impedance, the pull-up driver coupled to a node; a pull-down driver with a second impedance, the pull-down driver coupled to the node; and an equalizer coupled to the pull-up and pull-down drivers, wherein the equalizer is operable to be trained to deemphasize a signal driven on the node while maintaining the first and second impedances substantially constant.

Abstract: A pre-driver is provided that includes a pre-boost circuit and a post-boost circuit. The post-boost circuit may include a pulse generator circuit to provide a feedback to be used to control an output of the pre-driver.

Abstract: A pre-driver 102 has a data signal input 110 to receive a data signal, a pair of voltage inputs 103,107 to receive supply voltages, and a data output 135 to provide an output voltage. A voltage clamp 130 is connected between a predetermined one of the voltage inputs 103, 107 and the data output 135 to clamp the output voltage with respect to the predetermined supply voltage. Other embodiments and methods are also described and claimed.

Abstract: An output buffer generates an output signal having a plurality of low-to-high (LH) and high-to-low (HL) signal transitions, with each of the signal transitions having a clock-to-output delay. A pre-driver having a first and a second stage generates a reshaped waveform to trigger the LH and HL signal transitions of the output signal, with the first stage generating an initial waveform and the second stage modifying the initial waveform to generate the reshaped waveform based at least in part on a feedback reflective of a difference in the clock-to-output delays of the LH and HL signal transitions.

Abstract: An improved flexible cable construction is provided which includes two layers of conductor traces arranged alternately with three layers of dielectric material in a flattened configuration between ground plane outside metal surfaces. Each of the conductor layers includes alternating signal traces and ground traces. In an exemplary embodiment, vias are arranged in first and second planes through the cable. Longitudinal vias maintain the potential of ground planes at the same level as well as improving shielding effectiveness along an edge or thickness cross-section of the cable. Transverse vias are implemented to minimize antenna effects due to large openings at the point of cable entry into a sheet metal box containing high frequency electronics.

Abstract: A method in system for the testing of the electrical characteristics of an electronic module mounted on a printed circuit board. The method and system monitors selected signals from the Bottom Signal Pads of the electronic module. Thus, eliminating the need for a prototype or specialized printed circuit board in order to perform desired testing of signals.