Abstract: The present invention can provide a motor including a shaft, a bearing which supports the shaft, a shield including a first hole through which the shaft passes, and a base including a second hole through which the shaft passes, wherein the shield includes a first region disposed in the base and a second region extending from the first region, protruding outward from the base, and having the first hole, and the bearing is disposed in the first hole.

Abstract: The present invention provides a stator including magnets having six poles; a rotor disposed inside the stator and including thirteen slots; a coil wound around the slot; a rotary shaft coupled to the rotor; a commutator coupled to the rotary shaft and connected to the coil; and a plurality of brushes disposed to be pressed against the commutator and located to have an angular interval of 63° to 66° in the circumferential direction of the rotary shaft, thereby providing advantageous effects in that a current ripple is minimized and a torque is maximized.

Abstract: The present invention provides a stator including magnets having six poles; a rotor disposed inside the stator and including thirteen slots; a coil wound around the slot; a rotary shaft coupled to the rotor; a commutator coupled to the rotary shaft and connected to the coil; and a plurality of brushes disposed to be pressed against the commutator and located to have an angular interval of 63° to 66° in the circumferential direction of the rotary shaft, thereby providing advantageous effects in that a current ripple is minimized and a torque is maximized.

Abstract: A multi-chip package with a single die pad is provided. The multi-chip package includes a leadframe having a die pad and a plurality of leads surrounding the die pad. Each of the leads includes an upper lead, a lower lead and an intermediate lead substantially perpendicularly connected to the upper and lower leads, wherein the upper and lower leads are substantially parallel to the die pad. The upper and lower surfaces of the die pad are attached with upper and lower chips respectively. The upper chip is electrically connected to the upper surface of one part of the upper leads by a plurality of first bonding wires and the lower chip is electrically connected to the lower surfaces of the other part of the upper leads by a plurality of second bonding wires. A sealant is used to encapsulate the chips and bonding wires to protect these elements from damage.

Abstract: A semiconductor package structure including a chip and a leadframe unit is provided. The chip has an active surface and a plurality of recesses disposed thereon. The leadframe unit has at least one packaging area in which the chip is disposed. The packaging area has a plurality of leads on the peripheral portion thereof, wherein each of the leads has a first end fastened on the peripheral portion of the packaging area and a second end extending inward to the active surface of the chip. The leads have a plurality of protrusions, which are capable of being contained by the recesses, located on the second ends to electrically connect the chip and the leadframe unit.

Abstract: A chip package comprises a substrate, a chip, a conductive layer and a molding compound. The substrate has a carrying surface and at least a ground pad disposed on the carrying surface. The chip has an active surface and a back surface opposite thereto. The chip is bonded to the substrate with the active surface facing towards the carrying surface of the substrate, wherein the ground pad is disposed outside of the chip. The conductive layer covers the chip and a portion of the carrying surface, and electrically connects to the ground pad. The molding compound is disposed on the carrying surface of the substrate and encapsulates the chip and the conductive layer.

Abstract: A multi-chip package with a single die pad is provided. The multi-chip package includes a leadframe having a die pad and a plurality of leads surrounding the die pad. Each of the leads includes an upper lead, a lower lead and an intermediate lead substantially perpendicularly connected to the upper and lower leads, wherein the upper and lower leads are substantially parallel to the die pad. The upper and lower surfaces of the die pad are attached with upper and lower chips respectively. The upper chip is electrically connected to the upper surface of one part of the upper leads by a plurality of first bonding wires and the lower chip is electrically connected to the lower surfaces of the other part of the upper leads by a plurality of second bonding wires. A sealant is used to encapsulate the chips and bonding wires to protect these elements from damage.

Abstract: A POP device includes a leadframe, a first chip, an encapsulant and a second chip. The leadframe includes a die pad, a plurality of first and second leads. First leads have first top and bottom surfaces. Second leads include top leads, bottom leads and intermediate leads physically connected to top leads and bottom leads. Top leads have second top surfaces. Bottom leads have second bottom surfaces. The top lead and the bottom lead are not coplanar, and the bottom lead and the first lead are coplanar. The first chip is mounted on the die pad and electrically connected to the first top surfaces. The encapsulant seals the first chip and a part of the leadframe, and exposes the first bottom surfaces, the second top surfaces and the second bottom surfaces. The second chip is mounted on the encapsulant and electrically connected to the second top surfaces.