Abstract: A capsulorhexis device is inserted into an incision site of a cornea to make an incision in an anterior capsule surrounding a crystalline lens. The capsulorhexis device includes a loop having elasticity and conductivity; a moving member having one end fixed and coupled to the loop; an insertion guide configured so that, while the incision is being made in the crystalline lens capsule, a front end thereof is inserted into the incision site of the cornea; and a housing having one end coupled to a rear end of the insertion guide, wherein the loop is housed in the housing and, to make the incision in the crystalline lens capsule, slides in the housing together with the moving member to pass through the insertion guide and be deployed into an anterior chamber of the eye.

Abstract: A display device includes a first pixel, a second pixel, and a third pixel, each disposed on a substrate and including a pixel circuit, a first metal line disposed at a first metal layer on the substrate, extending in a first direction on a first side of the pixel circuits of the first to third pixels, and electrically connected to at least one of the pixel circuits of the first to third pixels, a second metal line disposed at a second metal layer on the first metal layer, extending in the first direction on a first side of the first metal line, and electrically connected to at least one of the pixel circuits of the first to third pixels, and a third metal line disposed at the first metal layer, extending in the first direction on a first side of the second metal line, and electrically connected to at least one of the pixel circuits of the first to third pixels. Each of the first to third metal lines supplies a voltage to at least one of the pixel circuits of the first to third pixels.

Abstract: A display device comprises electrode patterns spaced apart from each other in a first direction; a via layer disposed on the electrode patterns; first electrodes, each of the first electrodes partially overlapping an electrode pattern of the electrode patterns on the via layer in a plan view and extending in a second direction intersecting the first direction; second electrodes, each of the second electrodes comprising a portion extending in the second direction, the first electrodes and the second electrodes being spaced apart from each other and alternately disposed with each other; and light emitting elements disposed on a first electrode of the first electrodes and a second electrode of the second electrodes. The first electrodes are in contact with the electrode patterns through first electrode contact holes penetrating the via layer, and the first electrode contact holes are spaced apart from each other in the first direction.

Abstract: A display device includes electrodes spaced apart from each other, light emitting elements disposed between the electrodes, and connection electrodes electrically connected to the light emitting elements. The connection electrodes include first areas in electrical contact with the light emitting elements and second areas extending upwardly from the light emitting elements. A space is formed between the light emitting elements and the second areas of the connection electrodes.

Abstract: A display device includes light-emitting elements disposed on first and second electrodes, and having first end portions disposed on the first electrode, and second end portions disposed on the second electrode, a first connecting electrode extending in a first direction and disposed on the first electrode, the first connecting electrode being in contact with the first end portions of the light-emitting elements, a second connecting electrode extending in the first direction and disposed on the second electrode, the second connecting electrode being in contact with the second end portions of the light-emitting elements, and a connecting electrode pattern disposed on the first electrode, the connecting electrode pattern overlapping the first connecting electrode. The second connecting electrode and the connecting electrode pattern include a same material, and a thickness of the first connecting electrode is less than a thickness of the second connecting electrode and the connecting electrode pattern.

Abstract: A display device includes an emission area, a first sub-region on one side of the emission area in a first direction, and a second sub-region on an other side of the emission area in the first direction, a bank layer surrounding the emission area, the first sub-region, and the second sub-region, a first voltage line extending in a second direction crossing the first direction in the first sub-region, and a second voltage line extending in the second direction in the second sub-region, a first electrode extending in the first direction and disposed across the first sub-region, the emission area, and the second sub-region, a second electrode extending in the first direction and including a portion spaced from the first electrode in the second direction in the emission area, and a plurality of light emitting elements on the first electrode and the second electrode in the emission area.

Abstract: A display device comprises an initialization voltage line on a substrate, a first interlayer insulating layer disposed on the initialization voltage line, a low potential voltage line disposed on the first interlayer insulating layer, and having a stepped portion and overlapping the initialization voltage line, an auxiliary pattern disposed on the low potential voltage line and forming a flat portion with the stepped portion of the low potential voltage line, a second interlayer insulating layer disposed on the auxiliary pattern, a planarization layer disposed on the second interlayer insulating layer, a first electrode and a second electrode disposed on the planarization layer and spaced apart from each other, a light emitting element having ends aligned on the first electrode and the second electrode, a first contact electrode electrically contacting an end of the light emitting element, and a second contact electrode electrically contacting another end of the light emitting element.

Abstract: A display device including a substrate, a bank pattern extending in a first direction on the substrate, a first electrode on the bank pattern, a second electrode on the substrate, a first insulating layer on the first electrode and the second electrode, a light emitting element on the first insulating layer, and including a first end on the first electrode, and a second end on the second electrode, a first connection electrode contacting the first end of the light emitting element, and a second connection electrode contacting the second end of the light emitting element, wherein the bank pattern overlaps the first electrode and does not overlap the second electrode.

Abstract: A display substrate includes a first gate line configured to receive a first gate clock, a second gate line adjacent to the first gate line and configured to receive a second gate clock, a first data line configured to transfer a first data signal inverted according to the first gate clock and the second gate clock, where the first data signal has a first polarity, a second data line configured to transfer a second data signal inverted according to the first gate clock and the second gate clock, where the second data signal has a second polarity different from the first polarity, a first pixel including a first high sub pixel electrically connected to the first gate line and the first data line, and a first low sub pixel electrically connected to the first gate line and the second data line.

Abstract: A display substrate includes a first switching element, an organic layer disposed on the first switching element, a capping layer disposed on the organic layer and a cover electrode covering the first emission hole. The first switching element is electrically connected to a gate line extending in a first direction, a data line extending in a second direction crossing the first direction and the pixel electrode disposed adjacent to the data line. The capping layer includes a first emission hole. The cover electrode overlaps the gate line as a first width. The cover electrode overlaps the first switching element as a second width. The second width is smaller than the first width.

Abstract: In a display panel and a method of manufacturing the same, the display panel includes a first display substrate, a second display substrate and a sealing member. The first display substrate includes a first alignment layer in a first display region and a first peripheral region of a first base substrate, and a first backflow-blocking pattern in the first peripheral region and having a curvature to surround a vertex portion of the first display region. The second display substrate includes a second alignment layer in a second display region which faces the first display region and a second peripheral region of a second base substrate. The sealing member includes a corner portion having substantially the same curvature as the first backflow-blocking pattern to surround an outline of the first and second peripheral regions.

Abstract: A display substrate includes a first switching element, an organic layer disposed on the first switching element, a capping layer disposed on the organic layer and a cover electrode covering the first emission hole. The first switching element is electrically connected to a gate line extending in a first direction, a data line extending in a second direction crossing the first direction and the pixel electrode disposed adjacent to the data line. The capping layer includes a first emission hole. The cover electrode overlaps the gate line as a first width. The cover electrode overlaps the first switching element as a second width. The second width is smaller than the first width.

Abstract: A display substrate includes a first gate line configured to receive a first gate clock, a second gate line adjacent to the first gate line and configured to receive a second gate clock, a first data line configured to transfer a first data signal inverted according to the first gate clock and the second gate clock, where the first data signal has a first polarity, a second data line configured to transfer a second data signal inverted according to the first gate clock and the second gate clock, where the second data signal has a second polarity different from the first polarity, a first pixel including a first high sub pixel electrically connected to the first gate line and the first data line, and a first low sub pixel electrically connected to the first gate line and the second data line.

Abstract: In a display panel and a method of manufacturing the same, the display panel includes a first display substrate, a second display substrate and a sealing member. The first display substrate includes a first alignment layer in a first display region and a first peripheral region of a first base substrate, and a first backflow-blocking pattern in the first peripheral region and having a curvature to surround a vertex portion of the first display region. The second display substrate includes a second alignment layer in a second display region which faces the first display region and a second peripheral region of a second base substrate. The sealing member includes a corner portion having substantially the same curvature as the first backflow-blocking pattern to surround an outline of the first and second peripheral regions.

Abstract: A semiconductor device with a load resistor is manufactured such that a contact is formed at both ends of the load resistor, and at least one contact is formed between the contacts, in order to prevent impurities from being generated within each contact while the contacts are being generated by etching an insulation layer phenomena of electric charge build up from occurring when an etching process fabricates an insulation layer to generate the contact in a long load resistor located under the insulation layer and insulated electrically and physically.

Abstract: A semiconductor device with a load resistor is manufactured such that a contact is formed at both ends of the load resistor, and at least one contact is formed between the contacts, in order to prevent impurities from being generated within each contact while the contacts are being generated by etching an insulation layer phenomena of electric charge build up from occurring when an etching process fabricates an insulation layer to generate the contact in a long load resistor located under the insulation layer and insulated electrically and physically.

Abstract: A semiconductor device with a load resistor is manufactured such that a contact is formed at both ends of the load resistor, and at least one contact is formed between the contacts, in order to prevent impurities from being generated within each contact while the contacts are being generated by etching an insulation layer phenomena of electric charge build up from occurring when an etching process fabricates an insulation layer to generate the contact in a long load resistor located under the insulation layer and insulated electrically and physically.

Abstract: A semiconductor device with a load resistor is manufactured such that a contact is formed at both ends of the load resistor, and at least one contact is formed between the contacts, in order to prevent impurities from being generated within each contact while the contacts are being generated by etching an insulation layer phenomena of electric charge build up from occurring when an etching process fabricates an insulation layer to generate the contact in a long load resistor located under the insulation layer and insulated electrically and physically.