Patents by Inventor Hong-Jyeh Jason Huang

Hong-Jyeh Jason Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Interactive set-top box having a unified memory architecture
    Patent number: 8902241
    Abstract: According to one embodiment, a graphics/video processor includes a memory controller. The memory controller includes a first arbiter that receives memory client requests to access a memory device, and a first memory buffer coupled to the first arbiter. The first arbiter stores client requests that are selected by the first arbiter. The memory controller also includes a second arbiter coupled to the first memory buffer and a second memory buffer coupled to the second arbiter. The second arbiter receives requests from the memory client requests stored in the first memory buffer. The second memory buffer stores the client requests selected by the second arbiter. Further, the memory controller includes a third arbiter coupled to the second memory buffer. The third arbiter provides access of the memory device to the client requests stored in the second memory buffer.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: December 2, 2014
    Assignee: CSR Technology Inc.
    Inventors: David R. Auld, Bruce K. Holmer, Hong-Jyeh Jason Huang, Gerard K. Yeh
  • Interactive set-top box having a unified memory architecture
    Patent number: 7986326
    Abstract: According to one embodiment, a graphics/video processor includes a memory controller. The memory controller includes a first arbiter that receives memory client requests to access a memory device, and a first memory buffer coupled to the first arbiter. The first arbiter stores client requests that are selected by the first arbiter. The memory controller also includes a second arbiter coupled to the first memory buffer and a second memory buffer coupled to the second arbiter. The second arbiter receives requests from the memory client requests stored in the first memory buffer. The second memory buffer stores the client requests selected by the second arbiter. Further, the memory controller includes a third arbiter coupled to the second memory buffer. The third arbiter provides access of the memory device to the client requests stored in the second memory buffer.
    Type: Grant
    Filed: February 5, 2010
    Date of Patent: July 26, 2011
    Assignee: Zoran Corporation
    Inventors: David R. Auld, Bruce K. Holmer, Hong-Jyeh Jason Huang, Gerard K. Yeh
  • Interactive set-top box having a unified memory architecture
    Patent number: 7688324
    Abstract: According to one embodiment, a graphics/video processor includes a memory controller. The memory controller includes a first arbiter that receives memory client requests to access a memory device, and a first memory buffer coupled to the first arbiter. The first arbiter stores client requests that are selected by the first arbiter. The memory controller also includes a second arbiter coupled to the first memory buffer and a second memory buffer coupled to the second arbiter. The second arbiter receives requests from the memory client requests stored in the first memory buffer. The second memory buffer stores the client requests selected by the second arbiter. Further, the memory controller includes a third arbiter coupled to the second memory buffer. The third arbiter provides access of the memory device to the client requests stored in the second memory buffer.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: March 30, 2010
    Assignee: Zoran Corporation
    Inventors: David R. Auld, Bruce K. Holmer, Hong-Jyeh Jason Huang, Gerard K. Yeh
  • Interactive set-top box having a unified memory architecture
    Patent number: 6526583
    Abstract: According to one embodiment, a graphics/video processor includes a memory controller. The memory controller includes a first arbiter that receives memory client requests to access a memory device, and a first memory buffer coupled to the first arbiter. The first arbiter stores client requests that are selected by the first arbiter. The memory controller also includes a second arbiter coupled to the first memory buffer and a second memory buffer coupled to the second arbiter. The second arbiter receives requests from the memory client requests stored in the first memory buffer. The second memory buffer stores the client requests selected by the second arbiter. Further, the memory controller includes a third arbiter coupled to the second memory buffer. The third arbiter provides access of the memory device to the client requests stored in the second memory buffer.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: February 25, 2003
    Assignee: Teralogic, Inc.
    Inventors: David R. Auld, Bruce K. Holmer, Hong-Jyeh Jason Huang, Gerard K. Yeh