Patents by Inventor Hong Kia KOH

Hong Kia KOH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process for integrated circuit fabrication using a buffer layer as a stop for chemical mechanical polishing of a coupled dielectric oxide layer
    Patent number: 11211254
    Abstract: A first dielectric layer made of a first dielectric material is deposited over a semiconductor substrate. A buffer layer is then deposited on an upper surface of the first dielectric layer. A trench is opened to extend through the buffer layer and the first dielectric layer. A second dielectric layer made of a second dielectric material is the deposited in a conformal manner on the buffer layer and filling the trench. Chemical mechanical polishing of the second dielectric layer is performed to remove overlying portions of the second dielectric layer with the buffer layer being used as a polish stop. After removing the buffer layer, the first dielectric layer and the second dielectric material filling the trench form a pre-metallization dielectric layer having a substantially planar upper surface.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: December 28, 2021
    Assignee: STMicroelectronics Pte Ltd
    Inventors: Yuzhan Wang, Pradeep Basavanahalli Kumarswamy, Hong Kia Koh, Alberto Leotti, Patrice Ramonda
  • PROCESS FOR INTEGRATED CIRCUIT FABRICATION USING A BUFFER LAYER AS A STOP FOR CHEMICAL MECHANICAL POLISHING OF A COUPLED DIELECTRIC OXIDE LAYER
    Publication number: 20210193476
    Abstract: A first dielectric layer made of a first dielectric material is deposited over a semiconductor substrate. A buffer layer is then deposited on an upper surface of the first dielectric layer. A trench is opened to extend through the buffer layer and the first dielectric layer. A second dielectric layer made of a second dielectric material is the deposited in a conformal manner on the buffer layer and filling the trench. Chemical mechanical polishing of the second dielectric layer is performed to remove overlying portions of the second dielectric layer with the buffer layer being used as a polish stop. After removing the buffer layer, the first dielectric layer and the second dielectric material filling the trench form a pre-metallization dielectric layer having a substantially planar upper surface.
    Type: Application
    Filed: November 12, 2020
    Publication date: June 24, 2021
    Applicant: STMicroelectronics Pte Ltd
    Inventors: Yuzhan WANG, Pradeep BASAVANAHALLI KUMARSWAMY, Hong Kia KOH, Alberto LEOTTI, Patrice RAMONDA