Patents by Inventor Hong Lin

Hong Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180190742
    Abstract: An organic light-emitting display panel, a display device, and an organic light-emitting display motherboard are provided. The organic light-emitting display panel includes a base substrate, a metal wire, a first insulation layer, and a conductive portion. The metal wire has an upper surface opposing to the base substrate. A material of the metal wire includes a first metal. The first insulation layer covers the upper surface of the metal wire and includes at least one hollow portion penetrating through the first insulation layer and exposing a portion of the upper surface of the metal wire. The conductive portion is electrically connected to the metal wire, and is not overlapped with the at least one hollow portion. A work function of a material of the conductive portion is G1, a work function of metal silver is G2, a work function of the first metal is G3, and G1>G2>G3.
    Type: Application
    Filed: February 28, 2018
    Publication date: July 5, 2018
    Inventors: Shui HE, Yingteng ZHAI, Yongxiang LIN, Hong LIN, Yong YUAN, Zaiwen ZHU, Qitai JI
  • Publication number: 20180182292
    Abstract: The present disclosure discloses a display panel and a display device. The display panel includes pixel circuits arranged in an array. Each pixel circuit includes a driving transistor, at least two switching transistors and at least two first auxiliary electrodes arranged in a one to one relationship to the switching transistors. By electrically connecting each of the first auxiliary electrodes with a gate of a related switching transistor, the first auxiliary electrode and the gate of the corresponding switching transistor have a same potential. A capacitor can be formed between the first auxiliary electrode and the active layer, and a capacitor is formed between the gate and the active layer.
    Type: Application
    Filed: February 13, 2018
    Publication date: June 28, 2018
    Inventors: Zaiwen Zhu, Hong Lin, Shui He, Sera Kenji, Isao Shoji, Zhonglan Cai
  • Publication number: 20180160954
    Abstract: This disclosure relates to a pulse oximeter. The pulse oximeter includes a light source emitting detecting light; a light acquirer spaced apart from the light source and so that the detecting light can get the light acquirer after passing through the object; a processor connected to the light acquirer; and a filter on the light path from the light source to the light acquirer. The filter includes a double band filter having center wavelengths of 660 nm and 940 nm. The double band filter can filter the unnecessary light and improve the accuracy of the pulse oximeter.
    Type: Application
    Filed: August 25, 2017
    Publication date: June 14, 2018
    Inventors: JUIN-HONG LIN, CHAO-TSANG WEI, HO-CHIANG LIU
  • Publication number: 20180160955
    Abstract: This disclosure relates to a pulse oximeter. The pulse oximeter includes a light source; a light acquirer spaced apart from the light source; a processor connected to the light acquirer; a filter in the light path from the light source to the light acquirer; and a first mechanical device. The filter includes a first single band filter having center wavelength of 660 nm and a second single band filter having center wavelength of 940 nm. The first mechanical device moves the filter so that the first single band filter and the second single band filter are alternately in the light path from the light source to the light acquirer. The double band filter can filter the unnecessary light and improve the accuracy of the pulse oximeter.
    Type: Application
    Filed: August 25, 2017
    Publication date: June 14, 2018
    Inventors: JUIN-HONG LIN, CHAO-TSANG WEI, HO-CHIANG LIU
  • Patent number: 9998872
    Abstract: Disclosed are methods and systems for supporting positioning operations in a cellular communication network including locating a mobile device in response to an emergency event. In one particular implementation, a first position fix may be provided quickly by a mobile device and may be followed by a second, more accurate, position fix at a later time. In particular implementations, the first and second position fixes may be provided using the 3GPP Long Term Evolution (LTE) Positioning Protocol (LPP) as part of a single LPP transaction and may further be provided using a user plane or control plane location solution.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: June 12, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Yongjin Jiang, Stephen William Edge, Kirk Allan Burroughs, Sven Fischer, Ie-Hong Lin
  • Publication number: 20180152161
    Abstract: A circuit includes a first device between a first input node and an internal node, a second device between a second input node and the internal node, a third device between the internal node and ground, a fourth device between the internal node and an output node, and a fifth device between the output node and ground. The second and third devices generate a direct current (DC) voltage on the internal node by dividing a bias voltage on the second input node. The fourth device generates, from the DC voltage, a first component of an output voltage on the output node. The first and third devices generate a modulation signal on the internal node by dividing a radio frequency (RF) signal on the first input node. The fifth device rectifies the modulation signal to generate a second output voltage component.
    Type: Application
    Filed: August 22, 2017
    Publication date: May 31, 2018
    Inventors: Hong-Lin CHU, Hsieh-Hung HSIEH, Tzu-Jin YEH
  • Publication number: 20180151511
    Abstract: A semiconductor device and a method of manufacture thereof are provided. The method for manufacturing the semiconductor device includes forming a first dielectric layer on a substrate. Next, forming a first dummy metal layer on the first dielectric layer. Then, forming a second dielectric layer over the first dummy metal layer. Furthermore, forming an opening in the second dielectric layer and the first dummy metal layer. Then, forming a dummy via in the opening, wherein the dummy via extending through the second dielectric layer and at least partially through the first dummy metal layer. Finally, forming a second dummy metal layer on the second dielectric layer and contact the dummy via.
    Type: Application
    Filed: January 3, 2017
    Publication date: May 31, 2018
    Inventors: Jian-Hong Lin, Kuo-Yen Liu, Hsin-Chun Chang, Tzu-Li Lee, Yu-Ching Lee, Yih-Ching Wang
  • Patent number: 9978350
    Abstract: An electronic percussion instrument for suppressing sound source noise is described. The instrument includes a percussion pad, a metal plate disposed below the percussion pad, at least one damping element disposed in a ring-like manner below the metal plate, a resonance conductive member disposed below the damping element, a sensor disposed at a central region below the resonance conductive member, and a noise suppressing mechanism disposed at a peripheral annular region below the resonance conductive member. The noise suppressing mechanism includes, in an order from top to bottom, a foam ring and a metal ring. The metal ring has a plurality of cushioning elements thereon. Accordingly, the instrument can effectively suppress or otherwise eliminate interference on and noise sensed by the sensor caused by vibration of a casing when the percussion pad is percussed. This can greatly improve the sound effect and performance of the instrument.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: May 22, 2018
    Assignee: SOUND & LIGHT CO., LTD.
    Inventor: Chih Hong Lin
  • Patent number: 9941138
    Abstract: A method for exposing polysilicon gate electrodes is disclose. The method comprises planarizing a pre-metal dielectric on a wafer surface; performing a selective etching process to the planarized pre-metal dielectric and a multi-layer dielectric which covers polysilicon gates in the wafer according to pre-set etching parameters to expose the polysilicon gates in the wafer. The selective etching process effectively control the amount of etching, which ensures high surface flatness when exposing the polysilicon gates without affecting the subsequent film deposition process. Therefore, wafer surface defects, gate stack damages, and polysilicon gate deformation caused by the conventional CMP process or the shear stress generated during the CMP process can be avoided, and then product yield can be enhanced.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: April 10, 2018
    Assignee: SHANGHAI IC R&D CENTER CO., LTD
    Inventor: Hong Lin
  • Patent number: 9941159
    Abstract: A method of making a semiconductor device includes forming a first opening in an insulating layer, forming a second opening in the insulating layer, forming a third opening in the insulating layer and filling the first opening, the second opening and the third opening with a conductive material. The first opening has a width and a length. The second opening has a width less than the length of the first opening, and is electrically connected to the first opening. The third opening has a width less than the width of the second opening, and is electrically connected to the second opening.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: April 10, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jian-Hong Lin, Hsin-Chun Chang, Shiou-Fan Chen, Chwei-Ching Chiu, Yung-Huei Lee
  • Patent number: 9929760
    Abstract: A tunable matching circuit for use with ultra-low power RF receivers is described to support a variety of RF communication bands. A switched-capacitor array and a switched-resistor array are used to adjust the input impedance presented by the operating characteristics of transistors in an ultra-low-power mode. An RF sensor may be used to monitor performance of the tunable matching circuit and thereby determine optimal setting of the digital control word that drives the switched-capacitor array and switched-resistor array. An effective match over a significant bandwidth is achievable. The optimal matching configuration may be updated at any time to adjust to changing operating conditions. Memory may be used to store the optimal matching configurations of the switched capacitor array and switched resistor array.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: March 27, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hong-Lin Chu, Hsieh-Hung Hsieh, Tzu-Jin Yeh
  • Patent number: 9904389
    Abstract: The present invention provides a touch panel wire arrangement circuit, the touch panel wire arrangement circuit comprises: an ITO region, metal wires, a touch control hole and an integrated circuit; the touch panel wire arrangement circuit further comprises: a rear end switch set, and the rear end switch set comprises: a plurality of switches, and a G electrode of each switch in the plurality of switches is inputted with a switch signal, and D electrodes of the plurality of switches are sequentially coupled to rear ends of the metal wires, and S electrodes of the plurality of switches are inputted with at least one voltage signals; the switch signal is: a signal at high voltage level as a touch panel TP signal does not function; the voltage signal is a common voltage V-com signal as the touch panel is in a display state.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: February 27, 2018
    Assignees: Shenzhen China Star Optoelectronics Technology Co., Ltd, Wuhan China Star Optoelectronics Technology Co., Ltd
    Inventor: Jian-Hong Lin
  • Patent number: 9905920
    Abstract: A smart electric meter is provided. The smart electric meter includes a body, an antenna holder, an antenna structure and a supporting member. The antenna holder is disposed on the body, wherein the antenna holder is annular. The antenna structure is disposed on the antenna holder, wherein the antenna structure is moveable along a circumferential direction of the antenna holder. The supporting member is connected to the antenna structure, wherein the supporting member is moveably disposed on the antenna holder, and the supporting member moves the antenna structure along the circumferential direction of the antenna holder.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: February 27, 2018
    Assignee: WISTRON NEWEB CORP.
    Inventors: Chia-Hong Lin, Chang-Hsiu Huang, I-Shan Chen, Guo-Cheng Tsai, Chun-Chia Kuo
  • Patent number: 9900192
    Abstract: A method of demodulating a signal packet includes steps of: determining whether a pulse width of each of pulses of one of bits of the signal packet is associated with bit 0 or bit 1; updating first counting data associated with a number of the pulses that define bit 0, and determining whether the first counting data is greater than a first threshold value; deciding that said one of the bits of the signal packet is a bit 0; updating second counting data associated with a number of the pulses that define bit 1, and determining whether the second counting data is greater than the second threshold value; deciding that said one of the bits of the signal packet is a bit 1.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: February 20, 2018
    Assignee: RADIANT OPTO-ELECTRONICS CORPORATION
    Inventors: Wei-Wen Hu, Jon-Hong Lin, Chun-Yi Sun
  • Patent number: 9900860
    Abstract: A method includes: receiving a request at a Secure User Plane Location (SUPL) Location Platform (SLP) for location-related service; producing a positioning method SUPL message that includes a posmethod parameter that includes a positioning protocol indicator indicating that SET capability transfer and positioning method selection are to be conducted in a positioning protocol layer; and sending the positioning method SUPL message from the SLP to a SUPL Enabled Terminal (SET) using a SUPL User Plane Location Protocol (ULP).
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: February 20, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Andreas Klaus Wachter, Stephen William Edge, Ie-Hong Lin
  • Publication number: 20180046044
    Abstract: An embedded touch panel and the manufacturing method thereof are disclosed. The embedded touch panel includes a TFT substrate, a liquid crystal layer, a color filter, a polarizer and a glass cover arranged in sequence, wherein the polarizer is a non-conductive polarizer. A transparent conductive layer is arranged between the polarizer and the color filter. The TFT substrate includes at least one grounded pin, and the transparent conductive layer electrically connects with the grounded pin on the TFT substrate. In view of the above, the transparent conductive layer and the non-conductive polarizer may replace the high impedance polarizer of the embedded touch panel so as to greatly reduce the manufacturing cost. In addition, by bonding the frame of the polarizer, the bubble issue occurring when bonding the polarizer may be avoided.
    Type: Application
    Filed: January 29, 2016
    Publication date: February 15, 2018
    Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventors: Yao-li HUANG, Gui CHEN, Jian-hong LIN
  • Publication number: 20180030697
    Abstract: A water tap assembly for a one-hole sink, includes: a main body having a water passage, cold and hot water passages, a cold-water inlet and a hot-water inlet for fluidly in communication with the cold and hot water passages respectively, wherein each of the cold and hot water passages has one end portion connected fluidly and respectively to the water passage; a cold-water control valve mounted rotatably between the cold water passage and the water passage; and a hot-water control valve mounted rotatably between the hot water passage and the water passage. The main body further includes a connection pipe that is adapted to be connected with the one-hole sink and that defines the cold-water inlet and the hot-water inlet such that cold or hot water in the water passages can flow out to an exterior of the main body through a water outlet of the water passage.
    Type: Application
    Filed: July 29, 2016
    Publication date: February 1, 2018
    Inventor: Chuan-Hong Lin
  • Patent number: 9881922
    Abstract: Vertical gate all around devices are formed by initially forming a first doped region and a second doped region that are planar with each other. A channel layer is formed over the first doped region and the second doped region, and a third doped region is formed over the channel layer. A fourth doped region is formed to be planar with the third doped region, and the first doped region, the second doped region, the third doped region, the fourth doped region, and the channel layer are patterned to form a first nanowire and a second nanowire, which are then used to form the vertical gate all around devices.
    Type: Grant
    Filed: August 1, 2016
    Date of Patent: January 30, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hong-Lin Chen, Shih-Cheng Chen, Ming-Shan Shieh, Chin-Chi Wang, Wai-Yi Lien, Chih-Hao Wang
  • Patent number: 9883569
    Abstract: A lamp control system includes at least one first lamp network, at least one second lamp network and a lamp control gateway. The first lamp network is configured to emit light and to transmit a first message, and includes a first physical layer. The second lamp network is configured to emit light and to transmit a first message, and includes a second physical layer different from the first physical layer. The lamp control gateway includes a processing module that is configured to receive the first message and the second message and to convert the first message and the second message in such a way that a first converted message and a second converted message comply with a predefined protocol.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: January 30, 2018
    Assignee: Radiant Opto-Electronics Corporation
    Inventors: Wei-Wen Hu, Peng-Hsiang Wu, Jon-Hong Lin, Chun-Yi Sun
  • Patent number: 9881116
    Abstract: A restricted region transform method and a restricted region transform device are disclosed. The method includes following steps: reading out bare board information of a printed circuit board and layout information of a plurality of components, wherein the layout information of the plurality of components corresponds to a plurality of physical restricted regions; setting a first region according to edge information in the bare board information; setting a plurality of second regions according to projections of the plurality of physical restricted regions on a surface of the printed circuit board; selecting every two second regions, which overlap each other, among the plurality of second regions, and the selected second regions constituting a restriction conflict set; and selectively amending the second regions in the restriction conflict set to remove one or more overlaps from the second regions in the restriction conflict set.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: January 30, 2018
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Cheng-Hsin Chen, Chun-Hong Lin, Chun-Chieh Chen, Cheng-Hsiang Huang