Patents by Inventor Hong-Lipp Ko

Hong-Lipp Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9507658
    Abstract: A data reading method, a memory storage device and a memory controlling circuit unit are provided. The method includes: receiving a first read command; setting a plurality of first read events in a multi trigger queue (MTQ) according to the first read command, wherein the first read events include a general read event and at least one cache read event; sending a first read command sequence according to at least one of the first read events and receiving first data from a rewritable non-volatile memory module; and if a decoding for the first data fails, resetting the MTQ, and sending at least one second read command sequence according to at least one second read event in the reset MTQ, wherein the at least one second read event includes at least one of the at least one cache reading event.
    Type: Grant
    Filed: December 25, 2014
    Date of Patent: November 29, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Hong-Lipp Ko, Chih-Wei Tsai, Kheng-Joo Tan
  • Publication number: 20160132384
    Abstract: A data reading method, a memory storage device and a memory controlling circuit unit are provided. The method includes: receiving a first read command; setting a plurality of first read events in a multi trigger queue (MTQ) according to the first read command, wherein the first read events include a general read event and at least one cache read event; sending a first read command sequence according to at least one of the first read events and receiving first data from a rewritable non-volatile memory module; and if a decoding for the first data fails, resetting the MTQ, and sending at least one second read command sequence according to at least one second read event in the reset MTQ, wherein the at least one second read event includes at least one of the at least one cache reading event.
    Type: Application
    Filed: December 25, 2014
    Publication date: May 12, 2016
    Inventors: Hong-Lipp Ko, Chih-Wei Tsai, Kheng-Joo Tan
  • Patent number: 9312011
    Abstract: A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: writing data into at least one first logical unit and at least one second logical unit, and the data includes first data and second data; storing first data into at least one first physical erasing unit and filling the first physical erasing unit with the first data; storing second data into at least one second physical erasing unit; determining whether a remaining space of each second physical erasing unit is less than a threshold; if the remaining space of one of the at least one second physical erasing unit is less than the threshold, selecting at least one fourth physical erasing unit from a spare area and writing the second data into the at least one second physical erasing unit and the at least one fourth physical erasing unit.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: April 12, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Hong-Lipp Ko, Kheng-Joo Tan, Teng-Chun Hsu, Chia-Hung Chien
  • Publication number: 20160099062
    Abstract: A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: writing data into at least one first logical unit and at least one second logical unit, and the data includes first data and second data; storing first data into at least one first physical erasing unit and filling the first physical erasing unit with the first data; storing second data into at least one second physical erasing unit; determining whether a remaining space of each second physical erasing unit is less than a threshold; if the remaining space of one of the at least one second physical erasing unit is less than the threshold, selecting at least one fourth physical erasing unit from a spare area and writing the second data into the at least one second physical erasing unit and the at least one fourth physical erasing unit.
    Type: Application
    Filed: December 1, 2014
    Publication date: April 7, 2016
    Inventors: Hong-Lipp Ko, Kheng-Joo Tan, Teng-Chun Hsu, Chia-Hung Chien
  • Patent number: 9146861
    Abstract: A memory address management method, a memory controller, and a memory storage device are provided. The memory address management method includes: obtaining memory information of a rewritable non-volatile memory module and formatting logical addresses according to the memory information to establish a file system, such that an allocation unit of the file system includes a lower logical programming unit and an upper logical programming unit. Here, the memory information includes a programming sequence, the allocation unit starts with the lower logical programming unit and ends with the upper logical programming unit, and an initial logical address of a data region in the file system belongs to the lower logical programming unit. Accordingly, an access bandwidth of the memory storage device is expanded.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: September 29, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Hong-Lipp Ko, Teng-Chun Hsu, Po-Ting Chen, Te-Chang Tsui
  • Publication number: 20150046632
    Abstract: A memory address management method, a memory controller, and a memory storage device are provided. The memory address management method includes: obtaining memory information of a rewritable non-volatile memory module and formatting logical addresses according to the memory information to establish a file system, such that an allocation unit of the file system includes a lower logical programming unit and an upper logical programming unit. Here, the memory information includes a programming sequence, the allocation unit starts with the lower logical programming unit and ends with the upper logical programming unit, and an initial logical address of a data region in the file system belongs to the lower logical programming unit. Accordingly, an access bandwidth of the memory storage device is expanded.
    Type: Application
    Filed: October 16, 2013
    Publication date: February 12, 2015
    Applicant: Phison Electronics Corp.
    Inventors: Hong-Lipp Ko, Teng-Chun Hsu, Po-Ting Chen, Te-Chang Tsui
  • Patent number: 8902671
    Abstract: A method for programming data is provided for a memory storage device having a rewritable non-volatile memory module and a buffer memory. The method includes receiving a plurality of data including a first-type data and at least one second-type data, and a size of the first-type data is smaller than a data size threshold. The method includes temporarily storing the plurality of data into the buffer memory, and programming the first-type data and at least one part of the at least one second-type data stored in the buffer memory into a physical program unit set if it is determined that the plurality of data are complied with a predetermined condition. The method includes obtaining writing statuses of the first-type data and the at least one part of the at least one second-type data at the same time.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: December 2, 2014
    Assignee: Phison Electronics Corp.
    Inventors: Hong-Lipp Ko, Kuo-Lung Lee, Teng-Chun Hsu
  • Publication number: 20140140142
    Abstract: A method for programming data is provided for a memory storage device having a rewritable non-volatile memory module and a buffer memory. The method includes receiving a plurality of data including a first-type data and at least one second-type data, and a size of the first-type data is smaller than a data size threshold. The method includes temporarily storing the plurality of data into the buffer memory, and programming the first-type data and at least one part of the at least one second-type data stored in the buffer memory into a physical program unit set if it is determined that the plurality of data are complied with a predetermined condition. The method includes obtaining writing statuses of the first-type data and the at least one part of the at least one second-type data at the same time.
    Type: Application
    Filed: March 6, 2013
    Publication date: May 22, 2014
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Hong-Lipp Ko, Kuo-Lung Lee, Teng-Chun Hsu
  • Patent number: 8706948
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: April 22, 2014
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Hong-Lipp Ko
  • Patent number: 8606970
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: December 10, 2013
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Hong-Lipp Ko
  • Patent number: 8595523
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: November 26, 2013
    Assignee: Phison Electronics Corp.
    Inventor: Hong-Lipp Ko
  • Publication number: 20120265905
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Application
    Filed: June 27, 2012
    Publication date: October 18, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chien-Hua Chu, Hong-Lipp Ko
  • Publication number: 20120233388
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Application
    Filed: May 22, 2012
    Publication date: September 13, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chien-Hua Chu, Hong-Lipp Ko
  • Patent number: 8266334
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: September 11, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Hong-Lipp Ko
  • Publication number: 20110202690
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Application
    Filed: April 21, 2010
    Publication date: August 18, 2011
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chien-Hua Chu, Hong-Lipp Ko
  • Publication number: 20110202780
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Application
    Filed: February 24, 2011
    Publication date: August 18, 2011
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Hong-Lipp Ko