Patents by Inventor Hong Ma

Hong Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200348784
    Abstract: A touch display substrate includes a common electrode, a common electrode line connected to the common electrode, a touch electrode, and a touch signal line connected to the touch electrode, wherein the common electrode is multiplexed as the touch electrode, and the common electrode line is multiplexed as the touch signal line, wherein the touch display substrate further comprises an inorganic insulation layer arranged between the touch electrode and the touch signal line, the touch electrode is electrically connected to the touch signal line through a via-hole penetrating through the inorganic insulation layer, and the touch electrode, the inorganic insulation layer and the touch signal line are stacked in sequence.
    Type: Application
    Filed: April 15, 2019
    Publication date: November 5, 2020
    Applicants: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xinguo WU, Fengguo WANG, Zhixuan GUO, Hong LIU, Bo MA, Kai LI, Liang TIAN, Shicheng SONG
  • Publication number: 20200347213
    Abstract: This disclosed is an encapsulant film made from a curable composition comprising: (A) a polyolefin polymer; (B) an organic peroxide; (C) a silane coupling agent; and (D) a co-agent comprising a silane compound of formula (I). This further disclosed is a process for preparing said encapsulant film.
    Type: Application
    Filed: October 31, 2017
    Publication date: November 5, 2020
    Inventors: Yunfeng Yang, Kainan Zhang, Yonghua Gong, Weiming Ma, Chao He, Hongyu Chen, Yabin Sun, Hong Yang, Yuyan Li
  • Publication number: 20200347212
    Abstract: The present disclosure relates to an encapsulant film made from a curable composition comprising: (A) a polyolefin polymer; (B) an organic peroxide; (C) a silane coupling agent; and (D) a co-agent comprising a monocyclic organosilazane of formula (I).
    Type: Application
    Filed: October 31, 2017
    Publication date: November 5, 2020
    Inventors: Chao He, Yunfeng Yang, Weiming Ma, Hongyu Chen, Yuyan Li, Hong Yang
  • Publication number: 20200312710
    Abstract: A semiconductor device has a semiconductor material in a substrate. The semiconductor device has an MOS transistor. A trench in the substrate extends from a top surface of the substrate) into the semiconductor material. A shield is disposed in the trench. The shield has a contact portion which extends toward a top surface of the trench. A gate of the MOS transistor is disposed in the trench over the shield. The gate is electrically isolated from the shield. The gate is electrically isolated from the contact portion of the shield by a shield isolation layer which covers an angled surface of the contact portion extending toward the top of the trench. Methods of forming the semiconductor device are disclosed.
    Type: Application
    Filed: August 21, 2019
    Publication date: October 1, 2020
    Inventors: Hong YANG, Seetharaman SRIDHAR, Ya ping CHEN, Fei MA, Yunlong LIU, Sunglyong KIM
  • Publication number: 20200308574
    Abstract: The present invention relates to ligation and/or assembly of nucleic acid molecules. Particularly, a double-stranded target nucleic acid having overhangs of at least one nucleotide is ligated with another nucleic acid molecule capable of forming a stem-loop structure with an overhang of at least one nucleotide. The invention is suitable for tagging nucleic acid molecules. In specific embodiments, the overhangs can be produced by chemical cleavage of phosphorothioate-modified nucleic acid molecules. The invention further relates to the amplification of the ligated product, and using the resultant amplicon for assembly of multiple nucleic acid fragments.
    Type: Application
    Filed: October 24, 2018
    Publication date: October 1, 2020
    Inventors: Kang ZHOU, Xiaoqiang MA, Hong LIANG
  • Patent number: 10790310
    Abstract: An array substrate, a display panel and a display device are provided. The array substrate includes a base substrate, and a metal connecting member, a first insulating layer, a signal line, a second insulating layer and a first electrode which are disposed on the base substrate in this order. The first insulating layer is located between the metal connecting member and the signal line, and the second insulating layer is located between the signal line and the common electrode. A material of the metal connecting member is different from a material of the signal line. The signal line is electrically connected to the first electrode through the metal connecting member. A contact resistance between the material of the metal connecting member and a material of the first electrode is smaller than a contact resistance between the material of the signal line and the material of the first electrode.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: September 29, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Hong Liu, Xinguo Wu, Fengguo Wang, Dawei Shi, Zifeng Wang, Wentao Wang, Lu Yang, Feng Li, Zhixuan Guo, Yuanbo Li, Bo Ma
  • Publication number: 20200288795
    Abstract: Embodiments relate generally to systems and methods for providing an anti-counterfeit element within a filtering mask. A method of manufacturing a filtering mask may comprise extruding a filtering material from a source of the filtering material; melt-blowing the extruded filtering material to form a plurality of fibers; collecting the melt-blown fibers onto an outer surface of a lathe, wherein the outer surface of the lathe comprises a logo pattern; forming a fiber material about the logo pattern on the outer surface of the lathe via the collected melt-blown fibers; removing the formed fiber material to create an anti-counterfeit layer for use in the filtering mask, wherein at least one surface of the anti-counterfeit layer comprises the logo pattern within the fiber material; and assembling the anti-counterfeit layer within the filtering mask.
    Type: Application
    Filed: November 30, 2017
    Publication date: September 17, 2020
    Inventors: Hong Bing XIANG, Weifeng SHEN, Yuzheng LU, Chuang MA
  • Patent number: 10767170
    Abstract: Provided are a fungus-sourced high-temperature neutral Family-45 cullulase as well as a coding gene and application thereof. The cullulase has optimal pH value of 5.5, and optimal temperature of 60° C., has certain enzyme activity in alkaline condition, and has good alkali resistance, maintains about 70% enzyme activity in optimal condition after being processed at 90° C. for 1 hour, maintains about 50% enzyme activity in optimal condition after being processed in boiling water for 1 hour, and can be well applied in c and other fields.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: September 8, 2020
    Assignee: FEED RESEARCH INSTITUTE, CHINESE ACADEMY OF AGRICULTURAL SCIENCES
    Inventors: Bin Yao, Pengjun Shi, Hong Yang, Huoqing Huang, Huiying Luo, Peilong Yang, Yaru Wang, Xiaoyun Su, Yingguo Bai, Xia Shi, Rui Ma, Kun Meng
  • Publication number: 20200273953
    Abstract: One illustrative integrated circuit product disclosed herein includes a short-channel transistor device and a long-channel transistor device formed above a semiconductor substrate, wherein a first gate structure for the short-channel transistor device includes a short-channel WFM layer with a first upper surface that is positioned at a first distance above an upper surface of the semiconductor substrate, and wherein a second gate structure for the long-channel transistor device includes a long-channel WFM layer with a second upper surface that is positioned at a second distance above the upper surface of the semiconductor substrate, wherein the first distance is greater than the second distance.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 27, 2020
    Inventors: Tao Chu, Wei Ma, Jae Gon Lee, Hong Yu, Zhenyu Hu, Srikanth Balaji Samavedam
  • Patent number: 10752770
    Abstract: Embodiments of this invention relate to a composition comprising of (A) an anhydride and/or carboxylic acid functionalized, chlorinated olefin-based polymer and/or (b) a styrene-based polymer and/or a functionalized styrene-based polymer, (B) a polyamide wax slurry, and (C) organic solvent, and which composition can be used as an adhesive to bond a fabric to a polyolefin elastomer (POE) thermoplastic sheet, articles made from the composition, and methods of producing the composition and articles.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: August 25, 2020
    Assignee: Dow Global Technologies LLC
    Inventors: Yongchun Chen, Hang Wu, Haiyang Yu, Weiming Ma, Hong Yang, Xiao Yi Pang
  • Patent number: 10737280
    Abstract: The present invention relates to an azolethione flotation collector and application thereof. According to the application, an azolethione compound such as a 1,3,4-thiadiazole-2-thione compound, a 1,3,4-oxadiazole-2-thione compound, a 1,2,4-triazole-3-thione compound or a 1,2,4,5-tetrazole-3-thione compound is used as a mineral flotation collector to be applied to ores containing copper, zinc, lead, nickel, cobalt, platinum, palladium, silver or gold minerals to realize flotation recovery of valuable metal minerals. Compared with common flotation collectors in the existing technologies, the flotation collector of the present invention can effectively improve enrichment and recovery of copper, zinc, lead, nickel, cobalt, platinum, palladium, silver or gold minerals.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: August 11, 2020
    Assignee: CENTRAL SOUTH UNIVERSITY
    Inventors: Guangyi Liu, Yaoguo Huang, Longqun Ma, Xiaoxue Niu, Jun Liu, Hong Zhong, Zhe Hu
  • Publication number: 20200252055
    Abstract: Systems for calibrating impedances caused by a first component and a second component of a voltage-mode transmitter driver are described herein. The first component includes a first transistor and a first resistor connected to the first transistor, wherein the first component is connected to a voltage source and an output end of the voltage-mode transmitter driver, respectively. The second component includes a second transistor and a second resistor connected to the second transistor, wherein the second component is connected to the output end of the voltage-mode transmitter driver, and a third transistor, respectively. A first gate of the third transistor is applied with a first tunable gate voltage, and the first tunable gate voltage is configured to be tuned to calibrate a first impedance between the output end and a ground to match with a second impedance between the voltage source and the output end.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 6, 2020
    Inventors: Fei Guo, Yihui Li, Hong Xue, Xin Ma, Hui Wang
  • Publication number: 20200252057
    Abstract: A low-power transmitter for transmitting digital signals from an integrated chip is described herein. The transmitter includes a voltage-mode transmitter driver comprised of a plurality of driver slices, which includes an up-cell having a first resistor and a first transistor, and a down-cell having a second resistor, a second transistor, and a third transistor. A calibration circuit drives a replica circuit to a desired impedance by adjusting a first gate voltage applied to the first transistor of the replica of the up-cell and adjusting a second gate voltage applied to the third transistor of the replica of the down-cell. The calibrated first gate voltage is applied to the first transistor and to the second transistor of each of the plurality of driver slices and the calibrated second gate voltage is applied to the third transistor of each of the plurality of driver slices.
    Type: Application
    Filed: January 31, 2020
    Publication date: August 6, 2020
    Inventors: Fei Guo, Yihui Li, Hong Xue, Xin Ma, Hui Wang
  • Publication number: 20200215538
    Abstract: A self-driven microfluidic chip for rapid influenza A detection is provided. The chip includes: a substrate, a hydrophobic layer, a hydrophilic film layer, and a channel structure layer laminated sequentially. The structure of the channel structure layer includes a plurality of channels, a plurality of valves and reaction chambers in the channels, and a plurality of openings, wherein the hydrophilic film layer includes a pattern corresponding to the structure of the channel structure layer, and forms a disconnected area corresponding to the location of the valves to make the valves hydrophobic; the channel structure layer is formed of a flexible material, and heights of the valves are higher than those of the channels in a thickness direction of the channel structure layer in order to control liquid flow by pressing the valves.
    Type: Application
    Filed: April 25, 2019
    Publication date: July 9, 2020
    Inventors: GWO-BIN LEE, YU-DONG MA, HSI-PIN MA, PO-CHIUN HUANG, KUANG-HSIEN LI, YI-HONG CHEN, YUNG-MAO LEE
  • Publication number: 20200212071
    Abstract: The present disclosure relates to the technical field of display. Disclosed are an array substrate and a preparation method therefor, and a display panel and a display device. The array substrate includes: a substrate; multiple gate lines, wherein the gate lines are located on the substrate, and extend along a first direction; multiple data lines, wherein the data lines are located on the substrate, and extend along a second direction, and the gate lines and the data lines intersect to define multiple pixel areas; and a touch-control electrode wiring wherein the touch-control electrode wiring has the same direction as that of the gate lines, and is arranged insulated from the gate lines on a different layer, and the orthographic projection of the touch-control electrode wiring on the substrate at least has an overlapping area with the orthographic projection of part of the gate lines on the substrate.
    Type: Application
    Filed: March 22, 2019
    Publication date: July 2, 2020
    Inventors: Zhixuan GUO, Fengguo WANG, Yezhou FANG, Feng LI, Xinguo WU, Hong LIU, Zifeng WANG, Lei LI, Feng LI, Kai LI, Liang TIAN, Jing ZHAO, Zhengkui WANG, Bo MA, Haiqin LIANG, Peng LIU
  • Publication number: 20200212218
    Abstract: A trench gate metal oxide semiconductor field effect transistor (MOSFET) device includes an epitaxial layer on a substrate both doped a first conductivity type. Active area trenches have polysilicon gates over a double shield field plate. A junction termination trench includes a single shield field plate in a junction termination area which encloses the active area that includes a retrograde dopant profile of the second conductivity type into the epitaxial layer in the junction termination area. Pbody regions of a second conductivity type are between active trenches and between the outermost active trench and the junction termination trench. Source regions of the first conductivity type are in the body regions between adjacent active trenches. Metal contacts are over contact apertures that extend through a pre-metal dielectric layer reaching the body region under the source region, the single shield field plate, and that couples together the polysilicon gates.
    Type: Application
    Filed: December 27, 2018
    Publication date: July 2, 2020
    Inventors: SUNGLYONG KIM, SEETHARAMAN SRIDHAR, HONG YANG, YA PING CHEN, YUNLONG LIU, FEI MA
  • Publication number: 20200197368
    Abstract: Provided are methods and compositions for prolonging survival and/or reducing or inhibiting tumor growth in a cancer subject receiving a regimen of one or more chemotherapeutic agents, an inhibitor of soluble epoxide hydrolase (sEHi) and a non-steroidal anti-inflammatory drug (NSAID) that inhibits one or more enzymes selected from the group consisting of cyclo-oxygenase (“COX”)-1, COX-2, and 5-lipoxygenase (“5-LOX”). The methods and compositions decrease toxicity and/or adverse side effects in subjects receiving a regimen of one or more chemotherapeutic agents.
    Type: Application
    Filed: August 14, 2018
    Publication date: June 25, 2020
    Inventors: Bruce D. HAMMOCK, Sung Hee HWANG, Ralph W. de VERE WHITE, Chong-xian PAN, Hongyong ZHANG, Paul HENDERSON, Ai-Hong MA, Maike ZIMMERMAN, Fuli WANG
  • Publication number: 20200196225
    Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). Embodiments of the disclosure provide a method, device and apparatus for initial access, wherein a method for initial access includes: receiving a first configuration message; and establishing a connection between a relay node and an anchor node, based on the first configuration message. The method provided in this disclosure establishes a connection between the relay node and a central unit of the anchor node through the information interaction between base stations and the information interaction between base station and relay node. The present disclosure provides a scheduling method and a first node.
    Type: Application
    Filed: December 13, 2019
    Publication date: June 18, 2020
    Inventors: Weiwei WANG, Lixiang XU, Xiaoning MA, Yi WANG, Yingyang LI, Hong WANG
  • Publication number: 20200185416
    Abstract: An array substrate is provided. The array substrate include a base, a first electrode and a second electrode which are on the base and a touch line on the base, both the first electrode and the second electrode are configured to transmit a display signal, the touch line is configured to transmit a touch signal; the first electrode and the touch line are respectively in different layers, and an orthographic projection of the first electrode on the base at least partially overlaps with an orthographic projection of the touch line on the base. A preparation method of the array substrate and a touch display panel are further provided.
    Type: Application
    Filed: August 6, 2018
    Publication date: June 11, 2020
    Inventors: Xinguo WU, Fengguo WANG, Dawei SHI, Hong LIU, Zifeng WANG, Feng LI, Bo MA, Zhixuan GUO, Yuanbo LI, Jing ZHAO, Cenhong DUAN, Haiqin LIANG
  • Publication number: 20200176477
    Abstract: An array substrate, a display panel and a display device are provided. The array substrate includes a base substrate, and a metal connecting member, a first insulating layer, a signal line, a second insulating layer and a first electrode which are disposed on the base substrate in this order. The first insulating layer is located between the metal connecting member and the signal line, and the second insulating layer is located between the signal line and the common electrode. A material of the metal connecting member is different from a material of the signal line. The signal line is electrically connected to the first electrode through the metal connecting member. A contact resistance between the material of the metal connecting member and a material of the first electrode is smaller than a contact resistance between the material of the signal line and the material of the first electrode.
    Type: Application
    Filed: January 3, 2018
    Publication date: June 4, 2020
    Inventors: Hong Liu, Xinguo Wu, Fengguo Wang, Dawei Shi, Zifeng Wang, Wentao Wang, Lu Yang, Feng Li, Zhixuan Guo, Yuanbo Li, Bo Ma