Abstract: Disclosed are novel compounds of Chemical Formula 1, optical isomers of the compounds, and pharmaceutically acceptable salts of the compounds or the optical isomers. The compounds, isomers, and salts exhibit excellent activity as GLP-1 receptor agonists. In particular, they, as GLP-1 receptor agonists, exhibit excellent glucose tolerance, thus having a great potential to be used as therapeutic agents for metabolic diseases. Moreover, they exhibit excellent pharmacological safety for cardiovascular systems.

Abstract: A method of fabricating a recess channel array transistor. Using a mask layer pattern having a high etch selectivity with respect to a silicon substrate, the silicon substrate and an isolation insulating layer are etched to form a recess channel trench. After forming a gate insulating layer and a recess gate stack on the recess channel trench, a source and a drain are formed in the silicon substrate adjacent to both sidewalls of the recess gate stack, thereby completing the recess channel array transistor. Because the mask layer pattern having the high etch selectivity with respect to the silicon substrate is used, a depth of the recess channel trench is easily controlled while good etching uniformity of the silicon substrate is obtained.

Abstract: In a method of manufacturing a semiconductor device, a tungsten layer pattern having an oxidized surface is formed on a substrate. A source gas including silicon is provided to the oxidized surface of the tungsten layer pattern to form a protecting layer on the oxidized surface of the tungsten layer pattern. The protecting layer prevents an abnormal growth of oxide contained in the oxidized surface. The protecting layer prevents a whisker from growing from the oxidized surface of the tungsten layer pattern.

Abstract: An integrated circuit includes a substrate and a first insulating layer on the substrate that includes a first hole including a floor and a sidewall. A first conductive contact extends conformally on the sidewall and floor to define a groove in the first hole. A second insulating layer is provided on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is provided in the second hole and in the groove. These integrated circuits are fabricated by forming a first insulating layer on a substrate that includes a first hole including a floor and a sidewall. A first conductive contact is conformally formed on the sidewall and floor to define a groove in the first hole. A second insulating layer is formed on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is formed in the second hole and in the groove.

Abstract: A method of fabricating a recess channel array transistor. Using a mask layer pattern having a high etch selectivity with respect to a silicon substrate, the silicon substrate and an isolation insulating layer are etched to form a recess channel trench. After forming a gate insulating layer and a recess gate stack on the recess channel trench, a source and a drain are formed in the silicon substrate adjacent to both sidewalls of the recess gate stack, thereby completing the recess channel array transistor. Because the mask layer pattern having the high etch selectivity with respect to the silicon substrate is used, a depth of the recess channel trench is easily controlled while good etching uniformity of the silicon substrate is obtained.

Abstract: In a method of forming a contact in a semiconductor device, an insulating layer is formed on the semiconductor substrate. Then, a contact hole is formed by selectively etching the insulating layer. A barrier metal layer is deposited on side and bottom surfaces of the contact hole and on a top surface of the insulating layer to a uniform thickness. A wetting layer of an oxidation-resistive metal material is deposited on the barrier metal layer. A metal layer is formed on the wetting layer and fills the contact hole to thereby form a contact in the semiconductor device.

Abstract: An integrated circuit includes a substrate and a first insulating layer on the substrate that includes a first hole including a floor and a sidewall. A first conductive contact extends conformally on the sidewall and floor to define a groove in the first hole. A second insulating layer is provided on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is provided in the second hole and in the groove. These integrated circuits are fabricated by forming a first insulating layer on a substrate that includes a first hole including a floor and a sidewall. A first conductive contact is conformally formed on the sidewall and floor to define a groove in the first hole. A second insulating layer is formed on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is formed in the second hole and in the groove.

Abstract: In a method of manufacturing a semiconductor device, a tungsten layer pattern having an oxidized surface is formed on a substrate. A source gas including silicon is provided to the oxidized surface of the tungsten layer pattern to form a protecting layer on the oxidized surface of the tungsten layer pattern. The protecting layer prevents an abnormal growth of oxide contained in the oxidized surface. The protecting layer prevents a whisker from growing from the oxidized surface of the tungsten layer pattern.

Abstract: Disclosed are methods for forming a conductive film or a conductive pattern on a semiconductor substrate, including nitrifying a semiconductor substrate on which a tungsten film having a partially oxidized surface is formed to form a tungsten nitride film on the surface of the tungsten film, oxidizing the surface of the tungsten film having the tungsten nitride film to change the tungsten nitride film into a tungsten oxy-nitride film, and removing the tungsten oxy-nitride film and any residue generated by a reaction of tungsten from the surface of the tungsten film to form a tungsten film. Complete removal of residues generated by a reaction of tungsten from the surface of the tungsten film is made possible. Therefore, resistance of the tungsten film may be reduced, and failures generated by reacted residues formed on tungsten films may be prevented.

Abstract: In a method of forming a contact in a semiconductor device, an insulating layer is formed on the semiconductor substrate. Then, a contact hole is formed by selectively etching the insulating layer. A barrier metal layer is deposited on side and bottom surfaces of the contact hole and on a top surface of the insulating layer to a uniform thickness. A wetting layer of an oxidation-resistive metal material is deposited on the barrier metal layer. A metal layer is formed on the wetting layer and fills the contact hole to thereby form a contact in the semiconductor device.

Abstract: Disclosed are methods for forming a conductive film or a conductive pattern on a semiconductor substrate, including nitrifying a semiconductor substrate on which a tungsten film having a partially oxidized surface is formed to form a tungsten nitride film on the surface of the tungsten film, oxidizing the surface of the tungsten film having the tungsten nitride film to change the tungsten nitride film into a tungsten oxy-nitride film, and removing the tungsten oxy-nitride film and any residue generated by a reaction of tungsten from the surface of the tungsten film to form a tungsten film. Complete removal of residues generated by a reaction of tungsten from the surface of the tungsten film is made possible. Therefore, resistance of the tungsten film may be reduced, and failures generated by reacted residues formed on tungsten films may be prevented.

Abstract: An integrated circuit includes a substrate and a first insulating layer on the substrate that includes a first hole including a floor and a sidewall. A first conductive contact extends conformally on the sidewall and floor to define a groove in the first hole. A second insulating layer is provided on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is provided in the second hole and in the groove. These integrated circuits are fabricated by forming a first insulating layer on a substrate that includes a first hole including a floor and a sidewall. A first conductive contact is conformally formed on the sidewall and floor to define a groove in the first hole. A second insulating layer is formed on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is formed in the second hole and in the groove.