Abstract: The present invention relates to a method for stabilizing ceramide and to a cosmetic composition containing stabilized ceramide and, more specifically, to a method for homogenizing and stabilizing ceramide by self-assembling the ceramide together with ?-sitosterol, resveratrol, and allantoin which are other physiologically active substances using a microfluidic chip and a high pressure homogenizer, and to a technique for using ceramide and nanoparticles containing ?-sitosterol, resveratrol, and allantoin, which are produced by means of the stabilizing method, as a cosmetic material for skin moisturizing, anti-oxidation, skin inflammation relief, skin barrier enhancement, and skin itching relief.

Abstract: Resistance measuring structures for a stacked integrated circuit device are provided. The resistance measuring structures may include a first Complementary Field Effect Transistor (CFET) stack, a second CFET stack, and a conductive connection. The first CFET may include a first upper transistor that includes a first upper drain region and a first lower transistor that is between the substrate and the first upper transistor and includes a first lower drain region. The second CFET may include a second upper transistor that includes a second upper drain region and a second lower transistor that is between the substrate and the second upper transistor and includes a second lower drain region. The conductive connection may electrically connect the first upper drain region and the second upper drain region.

Abstract: Provided is a three-dimensionally (3D) stacked semiconductor chip architecture including a first semiconductor chip including a first wafer, a first front-end-of-line (FEOL) layer provided on a first side of the first wafer, a first middle-of-line (MOL) layer provided on the first FEOL layer, a first back-end-of-line (BEOL) layer provided on the first MOL layer, a first power rail layer provided on a second side of the first wafer, and a second semiconductor chip including a second wafer, a second FEOL layer provided on a first side of the second wafer, a second MOL layer provided on the second FEOL layer, a second BEOL layer provided on the second MOL layer, a second power rail layer provided on a second side of the second wafer, wherein the first power rail layer and the second power rail layer contact each other.

Abstract: Presented are structures and methods for forming such structures that allow for electrical or diffusion breaks between transistors of one level of a stacked transistor device, without necessarily requiring that a like electrical or diffusion break exists in another level of the stacked transistor device. Also presented, an electrical break between transistor devices may be formed by providing a channel of a first polarity with a false gate comprising a work-function metal of an opposite polarity.

Abstract: Disclosed is a method of preparing ethylene vinyl acetate including adding a monomer containing ethylene and vinyl acetate and a solvent containing alkyl acetate to a reactor and performing polymerization.

Abstract: Disclosed is a ternary CMOS device including a two-dimensional material layer formed of a two-dimensional material, an n-type MOSFET region stacked on a top of the two-dimensional material layer, and a p-type MOSFET region stacked on the top of the two-dimensional material layer, wherein the two-dimensional material layer includes a two-dimensional phase change material layer formed of a two-dimensional phase change material, an n-channel two-dimensional semiconductor material layer stacked on a bottom of the n-type MOSFET region and connected to one end of the two-dimensional phase change material layer, and a p-channel two-dimensional semiconductor material layer stacked on a bottom of the p-type MOSFET region and connected to the other end of the two-dimensional phase change material layer.

Abstract: A multi-stack semiconductor device includes: a substrate; a multi-stack transistor formed on the substrate and including a nanosheet transistor and a fin field-effect transistor (FinFET) above the nanosheet transistor, wherein the nanosheet transistor includes a plurality nanosheet layers surrounded by a lower gate structure except between the nanosheet layers, the FinFET includes at least one fin structure, of which at least top and side surfaces are surrounded by an upper gate structure, and each of the lower and upper gate structures includes: a gate oxide layer formed on the nanosheet layers and the at least one fin structure; and a gate metal pattern formed on the gate oxide layer. At least one of the lower and upper gate structures includes an extra gate (EG) oxide layer formed between the gate oxide layer and the nanosheet layers and/or between the gate oxide layer and the at least one fin structure.

Abstract: Disclosed is an accelerator performing an accumulation operation on a plurality of data, each being a floating point type. A method of operating the accelerator includes loading first data, finding a first exponent, which is a maximum value among exponents of the first data, generating aligned first fractions by performing a bit shift on first fractions of the first data based on the first exponent, and generating a first accumulated value by an accumulation operation on the aligned first fractions, loading second data, finding a second exponent, which is a maximum value among exponents of the second data, and generating a first aligned accumulated value by a bit shift on the first accumulated value, generating aligned second fractions by a bit shift on second fractions of the second data, and generating a second accumulated value by an accumulation operation on the aligned second fractions and the first aligned accumulated value.

Abstract: The present invention relates to humanized antibodies or antigen-binding fragments capable of binding specifically to mesothelin antigen and various uses thereof.

Abstract: A system and a method are disclosed for forming a bottle-neck shaped backside contact structure in a semiconductor device, wherein the bottle-neck shaped backside contact structure has a first side partially within the first source/drain structure, a second side contacting a backside power rail, and a liner extending from the first side to the backside power rail. The liner includes a first region comprised of either a Ta silicide liner or a Ti silicide liner, a second region comprised of a Ti/TiN liner and a third region comprised of either a Ta silicide liner or a Ti silicide liner. The backside contact structure includes a first portion having a positive slope and a second portion, adjacent to the first portion, having no slope.

Abstract: The present disclosure relates to a novel salt of a 1-sulfonyl pyrrole derivative, and to a novel salt having excellent solubility in vivo, stability, bioavailability, and the like, a preparation method thereof, and a pharmaceutical composition comprising the same.

Abstract: Resistor structures of stacked devices and methods of forming the same are provided. The, resistor structures may include a substrate, an upper semiconductor layer that may be spaced apart from the substrate in a vertical direction, a lower semiconductor layer that may be between the substrate and the upper semiconductor layer, and first and second resistor contacts that may be spaced apart from each other in a horizontal direction. At least one of the upper semiconductor layer, the lower semiconductor layer, and a portion of the substrate may contact the first and second resistor contacts.

Abstract: Disclosed is a substrate processing device which includes a substrate transfer part on which a transfer object is received and a jetting system part includes an ink jet body that jets and prints ink on the transfer object over an upper surface of the substrate transfer part, an ink module transfer part that transfers the ink jet body, an encoder disposed around the ink module transfer part to output a movement signal per unit movement distance of the ink module transfer part, an ink ejection controller that interworks with the ink jet body to control an ink jetting timing of the ink jet body, and a signal splitter that interworks with the encoder to count the movement signal, reset a width of the counted movement signal, and transmit the movement signal, the width of which is reset, to the ink ejection controller.

Abstract: The present disclosure relates to an antenna RF module, an RF module assembly including the antenna RF modules, and an antenna apparatus including the RF module assembly. Particularly, the antenna RF module includes an RF module, a radiation element module arranged on a first side of the RF filter, and an amplification unit board arranged on a second side of the RF filter, an analog amplification element being mounted on the amplification unit board. A plurality of antenna RF modules constitute the RF module assembly, and the RF module assembly and an antenna housing constitute the antenna apparatus. Accordingly, a radome that interrupts dissipation of heat to in front of an antenna is unnecessary, and heat generated from heat generating elements of the antenna apparatus is spatially separated. Thus, it is possible that the heat is dissipated in a distributed manner toward the front and rear directions of the antenna apparatus. The effect of greatly improving performance in heat dissipation can be achieved.

Abstract: The present invention relates to an integrated connector and a heat exchanger including the same, in which a connector main body is formed by pressing one pipe, a cap is press-fitted into the connector main body, such that the integrated connector is formed so that an interior of the connector main body is blocked by the cap. Therefore, the number of components used to manufacture a connector, which connects and securely couples a header tank and a gas-liquid separator, may be reduced, the integrated connector may be easily manufactured, and a brazing defect may be reduced at portions where the integrated connector is joined to the header tank and the gas-liquid separator of the heat exchanger.

Abstract: Integrated circuit devices and methods of forming the same. As an example, an integrated circuit device may include a substrate; a first transistor structure on the substrate; a second transistor structure stacked in a vertical direction on the first transistor structure; an isolation layer between the first transistor structure and the second transistor structure in the vertical direction; and a diode structure on the substrate and adjacent to the first transistor structure in a horizontal direction. The diode structure may be part of a discharging path between a gate electrode of the second transistor structure and the substrate. The discharging path may extend through the isolation layer.

Abstract: Nanosheet transistor devices are provided. A nanosheet transistor device includes a transistor stack that includes a lower nanosheet transistor having a first nanosheet width and a lower gate width. The transistor stack also includes an upper nanosheet transistor that is on the lower nanosheet transistor and that has a second nanosheet width and an upper gate width that are different from the first nanosheet width and the lower gate width, respectively. Related methods of forming a nanosheet transistor device are also provided.

Abstract: Integrated circuit devices and methods of forming the same. As an example, an integrated circuit device may include a first substrate; a first transistor structure on the substrate; a second transistor structure stacked in a vertical direction on the first transistor structure; an isolation layer between the first transistor structure and the second transistor structure in the vertical direction; a diode structure on the first substrate and adjacent to the first transistor structure in a horizontal direction; and a second substrate on the second transistor structure in the vertical direction. The diode structure may be part of a discharging path between a gate electrode of the second transistor structure and the second substrate. The discharging path may extend through the isolation layer.

Abstract: A multi-stack semiconductor device includes: a substrate; and a plurality of multi-stack transistor structures arranged on the substrate in a channel width direction, wherein the multi-stack transistor structure include at least one lower transistor structure and at least one upper transistor structure stacked above the lower transistor structure, wherein the lower and upper transistor structures include at least one channel layer as a current channel, wherein the lower transistor structures of at least two multi-stack transistor structures have different channel-layer widths.

Abstract: The present disclosure relates to a novel salt of a 1-sulfonyl pyrrole derivative, and to a novel salt having excellent solubility in vivo, stability, bioavailability, and the like, a preparation method thereof, and a pharmaceutical composition comprising the same.