Patents by Inventor Hong-Sil Jeong

Hong-Sil Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11695613
    Abstract: A method for generating a non-uniform constellation is provided. The method comprises the step of performing a first process, the first process comprising the steps of: obtaining a first constellation defined by one or more parameter values; and generating a second constellation based on the first constellation using a second process. The second process comprises the steps of: obtaining a set of candidate constellations, wherein the set of candidate constellations comprises the first constellation and one or more modified constellations, wherein each modified constellation is obtained by modifying the parameter values defining the first constellation; determining the performance of each candidate constellation according to a predetermined performance measure; selecting the candidate constellation having the best performance as the second constellation.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: July 4, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Belkacem Mouhouche, Daniel Ansorregui Lobete, Hong-sil Jeong
  • Patent number: 11677422
    Abstract: A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to perform parity-permutation by interleaving the parity bits and group-wise interleaving a plurality of bit groups configuring the interleaved parity bits based on a group-wise interleaving pattern including a first pattern and a second pattern; a puncturer configured to puncture some of the parity-permutated parity bits; and an additional parity generator configured to select at least some of the punctured parity bits to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern, wherein the first pattern determines parity bits to remain after the puncturing and then to be transmitted in the current frame.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: June 13, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyung-joong Kim, Se-ho Myung, Hong-sil Jeong
  • Patent number: 11658770
    Abstract: A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to interleave the parity bits and group-wise interleave a plurality of parity bit groups configuring the interleaved parity bits based on a group-wise interleaving pattern including a first pattern and a second pattern to perform parity permutation; a puncturer configured to puncture at least some of the group-wise interleaved parity bit groups; and an additional parity generator configured to select at least some of the punctured parity bit groups to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: May 23, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-ho Myung, Kyung-joong Kim, Hong-sil Jeong
  • Publication number: 20230155723
    Abstract: A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to perform by group-wise interleaving a plurality of bit groups configuring the parity bits based on a group-wise interleaving pattern comprising a first pattern and a second pattern; a puncturer configured to puncture some of the parity-permutated parity bits; and an additional parity generator configured to select at least some of the punctured parity bits to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern.
    Type: Application
    Filed: January 17, 2023
    Publication date: May 18, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-sil Jeong, Kyung-Joong Kim, Se-ho Myung
  • Publication number: 20230155724
    Abstract: A channel encoding method in a communication or broadcasting system is provided. The channel encoding method includes reading a first sequence corresponding to a parity check matrix, converting the first sequence to a second sequence by applying a certain rule to a block size corresponding to a parity check matrix and the first sequence, and encoding information bits based on the second sequence. The block size has at least two different integer values.
    Type: Application
    Filed: January 19, 2023
    Publication date: May 18, 2023
    Inventors: Kyung-Joong KIM, Seho MYUNG, Min JANG, Hong-Sil JEONG, Jae-Yoel KIM, Seok-Ki AHN
  • Publication number: 20230147023
    Abstract: A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 11, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-ho MYUNG, Hong-sil JEONG, Kyung-joong KIM
  • Patent number: 11641214
    Abstract: A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: May 2, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-ho Myung, Belkacem Mouhouche, Daniel Ansorregui Lobete, Kyung-joong Kim, Hong-sil Jeong
  • Patent number: 11637571
    Abstract: A transmitter is provided. The transmitter includes: a low density parity check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits; a repeater configured to select at least a part of bits constituting the LDPC codeword and add the selected bits after the input bits; and a puncturer configured to puncture at least a part of the parity bits.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: April 25, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-ho Myung, Kyung-joong Kim, Hong-sil Jeong
  • Patent number: 11637655
    Abstract: A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to perform a low-density parity check (LDPC) encoding on input bits using a parity check matrix to generate an LDPC codeword comprising information word bits and parity bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: April 25, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-sil Jeong, Kyung-joong Kim, Se-ho Myung, Daniel Ansorregui Lobete, Belkacem Mouhouche
  • Patent number: 11637735
    Abstract: A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: April 25, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-ho Myung, Belkacem Mouhouche, Daniel Ansorregui Lobete, Kyung-joong Kim, Hong-sil Jeong
  • Publication number: 20230124403
    Abstract: A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to perform parity permutation by interleaving the parity bits and group-wise interleaving a plurality of bit groups including the interleaved parity bits; and a puncturer configured to puncture some of the parity bits in the group-wise interleaved bit groups, wherein the parity permutator group-wise interleaves the bit groups such that some of the bit groups are positioned at predetermined positions, respectively, and a remainder of the bit groups are positioned without an order within the group-wise interleaved bit groups.
    Type: Application
    Filed: November 28, 2022
    Publication date: April 20, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-sil JEONG, Kyung-Joong KIM, Se-ho MYUNG
  • Publication number: 20230109262
    Abstract: A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to constitute Low Density Parity Check (LDPC) information bits including the outer-encoded bits and zero bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the LDPC information bits are divided into a plurality of bit groups, and wherein the zero padder pads zero bits to at least some of the plurality of bit groups, each of which is formed of a same number of bits, to constitute the LDPC information bits based on a predetermined shortening pattern which provides that the some of the plurality of bit groups are not sequentially disposed in the LDPC information bits.
    Type: Application
    Filed: December 5, 2022
    Publication date: April 6, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyung-Joong KIM, Se-ho MYUNG, Hong-sil JEONG
  • Patent number: 11622345
    Abstract: Methods and an apparatuses are provided for transmitting and receiving signaling information in a digital broadcasting system. A method includes encoding first signaling information for a physical layer to generate a first coded block; encoding second signaling information to generate a second coded block; and transmitting a frame including the first coded block, the second coded block, and at least one physical layer pipe (PLP) data. The first signaling information has a fixed number of bits. The second signaling information has a variable number of bits. The first signaling information comprises information indicating a forward error correction (FEC) type used for the second signaling information. The second signaling information comprises information indicating a modulation scheme of a related PLP, and information indicating a code rate of the related PLP.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: April 4, 2023
    Inventors: Hwan-Joon Kwon, Hak-Ju Lee, Jae-Yoel Kim, Yeon-Ju Lim, Sung-Ryul Yun, Hong-Sil Jeong, Seho Myung
  • Patent number: 11616514
    Abstract: An apparatus is provided for channel encoding in a communication system using an LDPC code. The apparatus includes at least one processor configured to encode input bits using a Bose-Chaudhuri-Hocquenghem (BCH) code, shorten one or more bits of the encoded input bits according to a number of bit groups to be shortened and an order among a plurality of orders according to which the bit groups are shortened, wherein the number of bit groups to be shortened is based on a number of bits to be shortened which is based on a number of the encoded input bits, encode information bits including the encoded input bits and the shortened one or more bits, using an LDPC code to generate parity bits, and puncture one or more bits in the parity bits based on a puncturing parameter among puncturing parameters; and a transmitter configured to transmit a signal that is generated from the encoded information bits based on the punctured one or more bits.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: March 28, 2023
    Inventors: Se-Ho Myung, Hong-Sil Jeong, Sung-Ryul Yun, Jae-Yoel Kim, Hyun-Koo Yang, Hak-Ju Lee, Jin-Hee Jeong
  • Patent number: 11601220
    Abstract: A transmitter apparatus and a receiver apparatus are provided. The transmitter apparatus includes: an encoder configured to generate a low density parity check (LDPC) by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol. The modulator maps a bit included in a predetermined group from among a plurality of groups constituting the LDPC codeword onto a predetermined bit in the modulation symbol.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: March 7, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-sil Jeong, Se-ho Myung, Kyung-joong Kim
  • Publication number: 20230065312
    Abstract: A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups each of which is formed of a same number of bits, maps the outer-encoded bits to some of the bits in the bit groups, and pads zero bits to remaining bits in the bit groups, based on a predetermined shortening pattern, thereby to constitute Low Density Parity Check (LDPC) information bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the remaining bits in which zero bits are padded include some of the bit groups which are not sequentially disposed in the LDPC information bits.
    Type: Application
    Filed: November 7, 2022
    Publication date: March 2, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-ho MYUNG, Kyung-joong KIM, Hong-sil JEONG
  • Patent number: 11595151
    Abstract: A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to perform by group-wise interleaving a plurality of bit groups configuring the parity bits based on a group-wise interleaving pattern comprising a first pattern and a second pattern; a puncturer configured to puncture some of the parity-permutated parity bits; and an additional parity generator configured to select at least some of the punctured parity bits to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: February 28, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-sil Jeong, Kyung-Joong Kim, Se-ho Myung
  • Patent number: 11575465
    Abstract: A channel encoding method in a communication or broadcasting system is provided. The channel encoding method includes reading a first sequence corresponding to a parity check matrix, converting the first sequence to a second sequence by applying a certain rule to a block size corresponding to a parity check matrix and the first sequence, and encoding information bits based on the second sequence. The block size has at least two different integer values.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: February 7, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Joong Kim, Seho Myung, Min Jang, Hong-Sil Jeong, Jae-Yoel Kim, Seok-Ki Ahn
  • Patent number: 11575393
    Abstract: A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver is formed of a plurality of columns each including a plurality of rows and includes a block interleaver configured to divide each of the plurality of columns into a first part and a second part and interleave the LDPC codeword, the number of rows constituting each column divided into the first part is determined differently depending upon the modulation method, wherein the number of rows constituting each column divided into the second part is determined depending upon the number of rows constituting each column divided into the first part.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: February 7, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-ho Myung, Hong-sil Jeong, Kyung-joong Kim
  • Patent number: 11575394
    Abstract: A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: February 7, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-ho Myung, Hong-sil Jeong, Kyung-joong Kim