Abstract: A capacitive switch includes a drive circuit, a detection circuit, a reference circuit and an identification unit. The drive circuit outputs a drive signal and a switching signal, wherein the drive signal is outputted to a first node and a second node. The detection circuit is sequentially coupled to the first node and the second node according to the switching signal and generates a first detection signal according to the drive signal. The reference circuit is sequentially coupled to the second node and the first node according to the switching signal and generates a second detection signal according to the drive signal. The identification unit includes a first input terminal and a second input terminal respectively coupled to the first node and the second node, and identifies a phase shift between inputted detection signals received by the first input terminal and the second input terminal.

Abstract: A low dropout linear regulator, a starting method, an electronic device, and a chip are provided. Wherein the low dropout linear regulator comprises an error amplifier circuit, an over current circuit and an over-current adjustor, the starting method includes: beginning a soft-starting process of the low dropout linear regulator and turning on a first transistor and a second transistor to provide a over current to raise an output voltage of the low dropout linear regulator; maintaining the ‘turn on’ state of the first transistor and the second transistor and decreasing the over current according to a signal obtained from the error amplifier circuit after the output voltage of the low dropout linear regulator reaches a starting voltage of the error amplifier circuit; wherein the error amplifier circuit begins to operate when the output voltage of the low dropout linear regulator reaches the starting voltage of the error amplifier circuit.

Abstract: A capacitive switch includes a drive circuit, a detection circuit, a reference circuit and an identification unit. The drive circuit outputs a drive signal and a switching signal, wherein the drive signal is outputted to a first node and a second node. The detection circuit is sequentially coupled to the first node and the second node according to the switching signal and generates a first detection signal according to the drive signal. The reference circuit is sequentially coupled to the second node and the first node according to the switching signal and generates a second detection signal according to the drive signal. The identification unit includes a first input terminal and a second input terminal respectively coupled to the first node and the second node, and identifies a phase shift between inputted detection signals received by the first input terminal and the second input terminal.

Abstract: A low dropout linear regulator, a starting method, an electronic device, and a chip are provided. Wherein the low dropout linear regulator comprises an error amplifier circuit, an over current circuit and an over-current adjustor, the starting method includes: beginning a soft-starting process of the low dropout linear regulator and turning on a first transistor and a second transistor to provide a over current to raise an output voltage of the low dropout linear regulator; maintaining the ‘turn on’ state of the first transistor and the second transistor and decreasing the over current according to a signal obtained from the error amplifier circuit after the output voltage of the low dropout linear regulator reaches a starting voltage of the error amplifier circuit; wherein the error amplifier circuit begins to operate when the output voltage of the low dropout linear regulator reaches the starting voltage of the error amplifier circuit.

Abstract: A capacitive switch includes a drive circuit, a detection circuit, a reference circuit and an identification unit. The drive circuit outputs a drive signal and a switching signal, wherein the drive signal is outputted to a first node and a second node. The detection circuit is sequentially coupled to the first node and the second node according to the switching signal and generates a first detection signal according to the drive signal. The reference circuit is sequentially coupled to the second node and the first node according to the switching signal and generates a second detection signal according to the drive signal. The identification unit includes a first input terminal and a second input terminal respectively coupled to the first node and the second node, and identifies a phase shift between inputted detection signals received by the first input terminal and the second input terminal.

Abstract: A capacitive switch includes a drive circuit, a detection circuit, a reference circuit and an identification unit. The drive circuit outputs a drive signal and a switching signal, wherein the drive signal is outputted to a first node and a second node. The detection circuit is sequentially coupled to the first node and the second node according to the switching signal and generates a first detection signal according to the drive signal. The reference circuit is sequentially coupled to the second node and the first node according to the switching signal and generates a second detection signal according to the drive signal. The identification unit includes a first input terminal and a second input terminal respectively coupled to the first node and the second node, and identifies a phase shift between inputted detection signals received by the first input terminal and the second input terminal.

Abstract: A capacitance sensing circuit, comprising: a first voltage source; a first switch, wherein the first voltage source charges a sensing capacitor to a first voltage when the first switch is conductive; a base capacitor; a second voltage source; a second switch, wherein the second voltage source charges the base capacitor to a second voltage when the second switch is conductive, where the first switch and the second switch are simultaneously conductive via a control signal; a first comparator, for outputting a first comparing result according to a voltage difference between a sensing voltage on the sensing capacitor and a base voltage on the base capacitor, and a voltage difference between the first voltage and the second voltage; and a voltage holding circuit, for keeping the base voltage at a reference voltage.

Abstract: There is provided a capacitive switch including a drive circuit, a detection circuit, a reference circuit and an identification unit. The drive circuit inputs identical drive signals to the detection circuit and the reference circuit. The detection circuit detects a touch according to a capacitance variation. The detection circuit outputs a first signal when the touch is not detected and outputs a second signal when the touch is detected. The reference circuit is a replica of the detection circuit and configured to output the first signal. The identification unit identifies a phase shift between the second signal of the detection circuit and the first signal of the reference circuit.

Abstract: A calibration method and apparatus for current and resistance are provided, where the current calibration method includes: injecting at least one portion of a set of predetermined compensation currents into at least one of an output current of a first current source and an output current of a second current source, and dynamically adjusting a distribution of the at least one portion of the set of predetermined compensation currents until two monitored voltage drops are equal to each other, and recording a first compensation current configuration; exchanging the first and second current sources, and dynamically adjusting the distribution of the at least one portion of the set of predetermined compensation currents until the two monitored voltage drops are equal to each other, and recording a second compensation current configuration; and according to the first and second compensation current configurations, generating a resultant compensation current, for use of current compensation.

Abstract: A low dropout linear regulator, a starting method, an electronic device, and a chip are provided. The starting method includes the steps of beginning a soft-starting process of the low dropout linear regulator and providing a first current; when an output voltage of the low dropout linear regulator reaches a starting voltage, providing a second current; and dynamically adjusting a threshold of an over current during the soft-starting process of the low dropout linear regulator, wherein the over current includes at least one of the first current and the second current. Through the low dropout linear regulator, the starting method, the electronic device, and the chip, there is short starting time and less overshoot of the output voltage, thereby achieving a fast and safe starting process. Moreover, the circuit is protected, and the usage quality and life is enhanced.

Abstract: A calibration method and apparatus for current and resistance are provided, where the current calibration method includes: injecting at least one portion of a set of predetermined compensation currents into at least one of an output current of a first current source and an output current of a second current source, and dynamically adjusting a distribution of the at least one portion of the set of predetermined compensation currents until two monitored voltage drops are equal to each other, and recording a first compensation current configuration; exchanging the first and second current sources, and dynamically adjusting the distribution of the at least one portion of the set of predetermined compensation currents until the two monitored voltage drops are equal to each other, and recording a second compensation current configuration; and according to the first and second compensation current configurations, generating a resultant compensation current, for use of current compensation.

Abstract: A capacitance sensing circuit, comprising: a first voltage source; a first switch, wherein the first voltage source charges a sensing capacitor to a first voltage when the first switch is conductive; a base capacitor; a second voltage source; a second switch, wherein the second voltage source charges the base capacitor to a second voltage when the second switch is conductive, where the first switch and the second switch are simultaneously conductive via a control signal; a first comparator, for outputting a first comparing result according to a voltage difference between a sensing voltage on the sensing capacitor and a base voltage on the base capacitor, and a voltage difference between the first voltage and the second voltage; and a voltage holding circuit, for keeping the base voltage at a reference voltage.

Abstract: There is provided a capacitive switch including a drive circuit, a detection circuit, a reference circuit and an identification unit. The drive circuit inputs identical drive signals to the detection circuit and the reference circuit. The detection circuit detects a touch according to a capacitance variation. The detection circuit outputs a first signal when the touch is not detected and outputs a second signal when the touch is detected. The reference circuit is a replica of the detection circuit and configured to output the first signal. The identification unit identifies a phase shift between the second signal of the detection circuit and the first signal of the reference circuit.

Abstract: A delay line calibration mechanism includes a first delay line, a second delay line, a phase detector, and a controller. The first delay line receives a first pulse and a first delay selection signal, and delays the first pulse for a first delay period according to the first delay selection signal to output a first delayed pulse. The second delay line receives a second pulse and a second delay selection signal, and delays the second pulse for a second delay period according to the second delay selection signal to output a second delayed pulse. The phase detector generates a phase difference signal indicating the phase difference between the first delayed pulse and the second delayed pulse by comparing the first delayed pulse and the second delayed pulse. The controller generates the second delay selection signal, and generates the first delay selection signal according to the phase difference signal.

Abstract: A delay line calibration mechanism includes a delay line, a phase detector, and a controller. The delay line receives an input pulse, a calibration pulse, a first delay selection signal, and a second delay selection signal, delays the input pulse for a delay period according to the first delay selection signal to output a delayed pulse, and delays the calibration pulse for a calibration delay period according to the second delay selection signal to output a delayed calibration pulse. The controller is for generating the input pulse, the calibration pulse, and a reference pulse. The controller also generates the first delay selection signal, and generates the second delay selection signal according to a phase difference signal. The phase detector is for generating the phase difference signal indicating the difference between the delayed calibration pulse and the reference pulse by comparing the delayed calibration pulse and the reference pulse.

Abstract: A frequency divider reduces jitter and power consumption, and includes a phase selector for receiving a plurality of clock signals and outputting an intermediate signal corresponding to phase characteristic of at least one of the clock signals, and an adjustable delay circuit for receiving the intermediate signal and generating an output signal by delaying the received intermediate signal.

Abstract: A frequency divider reduces jitter and power consumption, and includes a phase selector for receiving a plurality of clock signals and outputting an intermediate signal corresponding to phase characteristic of at least one of the clock signals, and an adjustable delay circuit for receiving the intermediate signal and generating an output signal by delaying the received intermediate signal.

Abstract: A delay line calibration mechanism includes a first delay line, a second delay line, a phase detector, and a controller. The first delay line receives a first pulse and a first delay selection signal, and delays the first pulse for a first delay period according to the first delay selection signal to output a first delayed pulse. The second delay line receives a second pulse and a second delay selection signal, and delays the second pulse for a second delay period according to the second delay selection signal to output a second delayed pulse. The phase detector generates a phase difference signal indicating the phase difference between the first delayed pulse and the second delayed pulse by comparing the first delayed pulse and the second delayed pulse. The controller generates the second delay selection signal, and generates the first delay selection signal according to the phase difference signal.

Abstract: Rather than using an external sampling clock to perform time-to-digital conversion function, input signal is self-sampled by its own delayed signals. A demodulation method utilizing delayed-self-sampling technique, comprising steps of: obtaining a signal processed by a limiting amplifier as the only input signal required for demodulation; transferring the limiting amplified signal via two paths, by one of which the limiting amplified signal is directly sent to an input end of a delayed-self-sampler, and by the other of which the limiting amplified signal is sent to a delay line for generating and outputting time delayed signals; sampling the limiting amplified signal by time delayed signals from the delay line with delayed-self-sampler to generate a group of sampled data; and converting the group of sampled data by a thermometer-to-binary converter into a group of binary codes, which is input into data decision circuitry to be processed into recovered base-band data.

Abstract: A phase-locked loop includes a phase detector, a charge pump and a controllable oscillator. The phase detector is supplied by a first supply voltage and is utilized for comparing a phase difference between an reference input signal and a feedback signal based on an output signal to generate at least one detect signal. The charge pump is supplied by a second supply voltage, and is utilized for generating a control signal with charge amounts according to the detect signal, where the first supply voltage is different from the second supply voltage. The controllable oscillator is utilized for generating the output signal according to the control signal, wherein a frequency of the output signal is adjusted by the control signal.