Patents by Inventor Hong Wan

Hong Wan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145728
    Abstract: Disclosed is an all-solid-state battery capable of suppressing volume expansion during charging and discharging.
    Type: Application
    Filed: April 10, 2023
    Publication date: May 2, 2024
    Inventors: Hee Soo Kang, Hong Suk Choi, Seon Hwa Kim, Jae Min Lim, Sang Wan Kim
  • Patent number: 11973222
    Abstract: A positive electrode active material precursor having a uniform particle size distribution and represented by Formula 1, wherein a percentage of fine powder with an average particle diameter (D50) of 1 ?m or less is generated when the positive electrode active material precursor is rolled at 2.5 kgf/cm2 is less than 1%, and an aspect ratio is 0.93 or more, and a method of preparing the positive electrode active material precursor [NixCoyM1zM2w](OH)2 ??[Formula 1] in Formula 1, 0.5?x<1, 0<y?0.5, 0<z?0.5, and 0?w?0.1, M1 includes at least one selected from the group consisting of Mn and Al, and M2 includes at least one selected from the group consisting of Zr, B, W, Mo, Cr, Nb, Mg, Hf, Ta, La, Ti, Sr, Ba, Ce, F, P, S, and Y. A method of preparing the positive electrode active material precursor is also provided.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: April 30, 2024
    Assignee: LG Chem, Ltd.
    Inventors: Seong Bae Kim, Yi Rang Lim, Kyoung Wan Park, Hyun Uk Kim, Hong Kyu Park, Chang Jun Moon, Eun Hee Kim
  • Publication number: 20240132567
    Abstract: Provided are methods of treating cancer (e.g., non-small cell lung cancer (NSCLC), head and neck squamous cell carcinoma (HNSCC), HER2-positive gastric/gastroesophageal junction (GEJ) cancer, de novo or transformed diffuse large B cell lymphoma (DLBCL), or indolent lymphoma) in an individual that comprise administering to the individual (a) a polypeptide comprising a SIRP? D1 domain variant and an Fc domain variant, and (b) an anti-cancer antibody (e.g., an anti-PD1 antibody, anti-HER2 antibody, or an anti-CD20 antibody). Also provided are related kits pharmaceutical compositions.
    Type: Application
    Filed: August 20, 2023
    Publication date: April 25, 2024
    Inventors: Jaume PONS, Hong WAN, Sophia RANDOLPH
  • Publication number: 20240128254
    Abstract: Stacked semiconductor die assemblies with support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a package substrate, a first semiconductor die attached to the package substrate, and a plurality of support members also attached to the package substrate. The plurality of support members can include a first support member and a second support member disposed at opposite sides of the first semiconductor die, and a second semiconductor die can be coupled to the support members such that at least a portion of the second semiconductor die is over the first semiconductor die.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 18, 2024
    Inventors: Hong Wan Ng, Seng Kim Ye
  • Publication number: 20240128182
    Abstract: Implementations described herein relate to various semiconductor device assemblies. In some implementations, a semiconductor device assembly may include a base layer, a dielectric interposer coupled to the base layer and including a first outer surface facing the base layer and an opposing second outer surface facing away from the base layer and spaced apart from the first outer surface in a direction, a first electrical-connection cut-in in the second outer surface that extends, in the direction, toward the first outer surface, and one or more first electrical connections disposed within the first electrical-connection cut-in such that at least a portion of the one or more first electrical connections does not extend, in the direction, beyond the second outer surface.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 18, 2024
    Inventors: Chin Hui CHONG, Seng Kim YE, Hong Wan NG, Kelvin Aik Boo TAN
  • Publication number: 20240128163
    Abstract: Substrates for semiconductor packages, including hybrid substrates for decoupling capacitors, and associated devices, systems, and methods are disclosed herein. In one embodiment, a substrate includes a first pair and a second pair of electrical contacts on a first surface of the substrate. The first pair of electrical contacts can be configured to receive a first surface-mount capacitor, and the second pair of electrical contacts can be configured to receive a second surface-mount capacitor. The first pair of electrical contacts can be spaced apart by a first space, and the second pair of electrical contacts can be spaced apart by a second space. The first and second spaces can correspond to corresponding to first and second distances between electrical contacts of the first and second surface-mount capacitors.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Inventors: Hong Wan Ng, Chin Hui Chong, Hem P. Takiar, Seng Kim Ye, Kelvin Tan Aik Boo
  • Patent number: 11958942
    Abstract: The present disclosure provides a method for recycling urea-formaldehyde (UF) from a wood-based panel. In the present disclosure, the UF is depolymerized by an ultrasonic treatment, and depolymerized UF can be reused for UF manufacture and wood-based panel production. The recycled and treated UF can be repeatedly used in wood-based panel manufacture without affecting performances of the wood-based panel. UF-glued wood-based panels can be recycled, and a recycled wood-based panel raw material can replace at least 50% of a non-recycled wood-based raw material for particle board production without affecting performances of the wood-based panel.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: April 16, 2024
    Assignee: Southwest Forestry University
    Inventors: Hui Wan, An Mao, Hong Lei, Xiaojian Zhou, Zhi Li, Long Yang, Linkun Xie, Guanben Du
  • Patent number: 11947561
    Abstract: An embodiment for analyzing and tracking data flow to determine proper schemas for unstructured data. The embodiment may automatically use a sidecar to collect schema discovery rules during conversion of raw data to unstructured data. The embodiment may automatically generate multiple schemas for different tenants using the collected schema discovery rules. The embodiment may automatically use ETL to export unstructured data to SQL databases with the generated multiple schemas for the different tenants. The embodiment may automatically monitor usage data of the SQL databases and collect the usage data. The embodiment may automatically optimize schema discovery using the collected usage data. The embodiment may automatically discover schemas with hot usage and apply the discovered schemas with hot usage to other tenants for consumption and further monitoring.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: April 2, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Peng Hui Jiang, Jun Su, Sheng Yan Sun, Hong Mei Zhang, Meng Wan
  • Patent number: 11939393
    Abstract: Provided herein, inter alia, are isolated, humanized antibodies that bind an extracellular domain of a human SIRP-? polypeptide. Also provided are polynucleotides, vectors, host cells, and methods of production and use related thereto.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: March 26, 2024
    Assignee: ALX Oncology Inc.
    Inventors: Jaume Pons, Bang Janet Sim, Hong Wan, Tracy Chia-Chien Kuo
  • Patent number: 11942460
    Abstract: Semiconductor devices and associated systems and methods are disclosed herein. In some embodiments, the semiconductor device is an assembly that includes a package substrate having a front side and a backside opposite the front side. A controller die with a first longitudinal footprint can be attached to the front side of the package substrate. A passive electrical component is also attached to the front side of the package substrate. A stack of semiconductor dies can be attached to the controller die and the passive electrical component. The stack of semiconductor dies has a second longitudinal footprint greater than the first longitudinal footprint in at least one dimension. The controller die and the passive electrical component are positioned at least partially within the second longitudinal footprint, thereby at least partially supporting the stack of semiconductor dies.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: March 26, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Hong Wan Ng, Kelvin Tan Aik Boo, Chin Hui Chong, Hem P. Takiar, Seng Kim Ye
  • Publication number: 20240093599
    Abstract: A lost circulation detection device includes a first detection member and a second detection member, a first signal transmitter and a first signal receiver are disposed on the first detection member, and the first signal transmitter transmits a signal along an axial direction of a rockshaft so that the first signal receiver acquires data information of drilling fluid in the axial direction of the rockshaft; a fluid channel penetrating through the second detection member is disposed in the second detection member, and the fluid channel is configurable to be in communication with the rockshaft; a second signal transmitter and a second signal receiver are disposed oppositely on two sides of the fluid channel, and the second signal transmitter transmits a signal along a center line of a second accommodating groove, so that the second signal receiver acquires data information of drilling fluid in a circumferential direction of the rockshaft.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Applicants: PetroChina Company Limited, CNPC Engineering Technology R&D Company Limited
    Inventors: Guangjie YUAN, Jingcui LI, Yan XIA, Jifang WAN, Gentai JIN, Guotao LI, Hong ZHANG, Tianen LIU, Pan FU, Yuhan PANG
  • Patent number: 11934359
    Abstract: A method, computer system, and a computer program product is provided for computer log management. In one embodiment, in response to receiving a log request from a user, an input content is analyzed and adjusted according to input contents and user's previous activities. A similarity analysis and a fairness analysis is performed to determine similarities between the input content, as adjusted, and a plurality of log records in an object library. The similarity analysis includes analyzing any patterns and attributes. The attributes have a dimension, and each dimension has a predefined weight (W). The fairness analysis ensures that one type of log is not favored over others. A best possible match is then determined, and one or more logs are presented to the user providing the best possible match.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: March 19, 2024
    Assignee: International Business Machines Corporation
    Inventors: Sheng Yan Sun, Peng Hui Jiang, Meng Wan, Hong Mei Zhang
  • Publication number: 20240086306
    Abstract: One or more computer processors generate a debug chain from one or more similar resource bound breakpoints, wherein the debug chain provides dynamic code flow. The one or more computer processors distribute the generated debug chain to one or more tenants.
    Type: Application
    Filed: September 13, 2022
    Publication date: March 14, 2024
    Inventors: Peng Hui Jiang, Jun Su, Sheng Yan Sun, Hong Mei Zhang, Meng Wan
  • Patent number: 11929351
    Abstract: An apparatus includes a substrate for mounting an integrated circuit. The substrate includes a primary layer including a first surface that is a first external surface of the substrate. The substrate includes an inner layer that is located below the primary layer and including a second surface. A portion of the second surface of the inner layer is exposed via an open area associated with the primary layer. The inner layer includes a first multiple of wire bond pads that are exposed via the open area associated with the primary layer.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: March 12, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Kelvin Tan Aik Boo, Chin Hui Chong, Seng Kim Ye, Hong Wan Ng, Hem P. Takiar
  • Publication number: 20240079599
    Abstract: Disclosed is an anodeless all-solid-state battery which may effectively control local volume expansion due to lithium deposited during charging of the battery. The all-solid-state battery includes an anode current collector, an intermediate layer located on the anode current collector, a solid electrolyte layer located on the intermediate layer, a cathode active material layer located on the solid electrolyte layer and including a cathode active material, and a cathode current collector located on the cathode active material layer. The intermediate layer includes carbon particles and metal particles alloyable with lithium, and the carbon particles include a first carbon material, e.g., as a spherical carbon material, and a second carbon material, e.g., a linear carbon material.
    Type: Application
    Filed: April 25, 2023
    Publication date: March 7, 2024
    Applicants: Hyundai Motor Company, Kia Corporation
    Inventors: Young Jin Nam, Hong Suk Choi, Seon Hwa Kim, Hee Soo Kang, Jae Min Lim, Sang Wan Kim
  • Publication number: 20240079306
    Abstract: A microelectronic device package includes a microelectronic device, a masking material defined (MMD) contact, and a non-masking material defined (NMMD) contact. The microelectronic device is supported on, and electrically connected to, one of a package substrate and a redistribution layer. The MMD contact is located in a first region of the one of the package substrate and the redistribution layer and facilitates a first electrical connection between the microelectronic device and the one of the package substrate and the redistribution layer. The NMMD contact is located in a second, different region of the one of the package substrate and the redistribution layer and facilitates a second electrical connection between the microelectronic device and the one of the package substrate and the redistribution layer. Related methods and systems are also disclosed.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Kelvin Tan Aik Boo, Wen Wei Lum, Hong Wan Ng
  • Publication number: 20240075101
    Abstract: Provided are methods of treating cancer that comprise administering a polypeptide (e.g. a fusion polypeptide) that comprises a SIRP? D1 domain variant and an Fc domain variant in combination with at least one chemotherapy agent and/or at least one therapeutic antibody. Also provided are related kits.
    Type: Application
    Filed: June 27, 2023
    Publication date: March 7, 2024
    Inventors: Hong WAN, Bang Janet SIM, Sophia RANDOLPH, Jaume PONS, Tracy Chia-Chien KUO
  • Publication number: 20240072022
    Abstract: Semiconductor devices, and related systems and methods, are disclosed herein. In some embodiments, the stacked semiconductor device includes a package substrate having an inner surface, a die stack carried by the inner surface, and a stacked capacitor device carried by the inner surface adjacent to the die stack. The die stack can include one or more semiconductor dies, each of which can be electrically coupled to the inner surface by one or more bond wires and/or solder structures. The stacked capacitor device can include a first capacitor having a lower surface attached to the inner surface of the package substrate, a interposer having a first side attached to an upper surface of the first capacitor, and a second capacitor attached to a second side of the interposer opposite the first side.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Seng Kim Ye, Kelvin Tan Aik Boo, Hong Wan Ng, Chin Hui Chong
  • Publication number: 20240072024
    Abstract: Modular systems in packages, and associated devices, systems, and methods, are disclosed herein. In one embodiment, a system comprises a main module package and an upper module package. The main module package includes a first substrate and a first electronic device mounted on a first side of the first substrate. The upper module package includes a second substrate and one or more second electronic devices mounted on a first side of the second substrate. The second substrate includes a cavity at a second side of the second substrate opposite the first side, and the upper module package is mountable on the first side of the first substrate of the main module package such that the first electronic device is positioned within the cavity and the second substrate generally surrounds at least a portion of a perimeter of the first electronic device.
    Type: Application
    Filed: August 27, 2022
    Publication date: February 29, 2024
    Inventors: Kelvin Tan Aik Boo, Hong Wan Ng, Seng Kim Ye, Chin Hui Chong
  • Publication number: 20240071869
    Abstract: A semiconductor device assembly including a substrate; a first split via including a first via land that is disposed on a surface of the substrate and that has a first footprint with a half-moon shape with a first radius of curvature, and a first via that passes through the substrate and that has a second radius of curvature, wherein the first via is disposed within the first footprint; and a second split via including a second via land that is disposed on the surface of the substrate and that has a second footprint with the half-moon shape with the first radius of curvature, and a second via that passes through the substrate and that has the second radius of curvature, wherein the second via is disposed within the second footprint, wherein the first and second via lands are disposed entirely within a circular region having the first radius of curvature.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 29, 2024
    Inventors: Hong Wan Ng, Seng Kim Ye, Kelvin Tan Aik Boo, Ling Pan, See Hiong Leow