Patents by Inventor Hong Wei
Hong Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12274099Abstract: Disclosed herein are global shutter image sensors and methods of operating such image sensors. An image sensor includes a semiconductor wafer having a light receiving surface opposite an electrical connection surface; an oxide extending from the light receiving surface toward the electrical connection surface and at least partially surrounding a pixel region; a photodiode disposed within the pixel region; and a set of storage nodes disposed under the photodiode, between the photodiode and the electrical connection surface. The set of storage nodes comprises a first storage node and a second storage node. The storage nodes may be disposed vertically beneath the photodiode, or side by side.Type: GrantFiled: March 29, 2022Date of Patent: April 8, 2025Assignee: Apple Inc.Inventors: Dajiang Yang, Hong Wei Lee, Xiaofeng Fan, Oray O. Cellek, Xiangli Li, Kai Shen
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Publication number: 20250111735Abstract: There are provided a gaming machine and method that utilize game-logic circuitry and a presentation assembly configured to present a plurality of symbol-bearing base reels and a base array. The plurality of base reels are repeatedly spun and stopped to land symbols from the base reels in the base array. In response to the landed symbols including a triggering symbol combination, a level up mode recursively adds additional pluralities of symbol bearing reels and arrays for each subsequent triggering symbol combination prior to exhaustion of a spin counter. The symbols forming each triggering combination are at least partially removed from the reels and replaced with replacement symbols including enhanced payment symbols to make the game more lucrative at each level.Type: ApplicationFiled: October 2, 2024Publication date: April 3, 2025Inventors: Ted HASE, Kyle LEIBOVITZ, Joshua SIEVERDING, Yanis TSOMBANIDIS, Emily WASIELEWSKI, Hong WEI
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Patent number: 12260714Abstract: A gaming machine is described herein. The gaming machine includes a processor programmed to execute an algorithm including the steps of displaying a game screen including a plurality reels, a bonus wheel including a plurality of wheel wedges displaying prize symbols and a prize selector, and a bonus wheel meter including a number of bonus wheel symbols. The processor is programmed to spin and stop the reels to display an instance of the game, detect an appearance of a bonus wheel symbol appearing in the reels with the reels stopped, and increase the number of bonus wheel symbols included in the bonus wheel meter based on the detected bonus wheel symbol. The processor initiates a bonus wheel feature including a spin of the bonus wheel upon determining the increased number of bonus wheel symbols included in the bonus wheel meter is equal to a predefined number of bonus wheel symbols.Type: GrantFiled: January 28, 2022Date of Patent: March 25, 2025Assignee: Konami Gaming, Inc.Inventors: Hong Wei, Scott Dorsch, Sam Ellis
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Publication number: 20250083536Abstract: A trailer adapted for use with an electric tractor is provided. In one embodiment, the trailer includes: a chassis comprising at least one electric drive axle, the at least one drive axle comprising at least one electric drive motor; a motor control unit (MCU) coupled to the at least one electric drive motor of the electric drive axle; a power storage device coupled to the at least one electric drive motor via the motor control unit (MCU); at least one sensor; and a vehicle control unit (VCU) coupled to the motor control unit (MCU), the power storage device, and the at least one sensor, the vehicle control unit adapted to receive an input signal from the at least one sensor and provide at least one control signal to the power storage device and the motor control unit (MCU), wherein the VCU is adapted to control the motor control unit to operate the at least one motor of the electric drive axle in a drive mode and in an energy recovery mode.Type: ApplicationFiled: November 12, 2024Publication date: March 13, 2025Inventor: HONG-WEI JING
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Publication number: 20250072081Abstract: A method for forming a semiconductor structure is provided. The method includes providing a substrate with a word line region and a select gate region adjacent to each other, sequentially forming a stack layer and a hard mask layer on the substrate, and forming patterned mandrels on the hard mask layer. The method includes forming sidewall spacers on the patterned mandrels, and forming a patterned photoresist over the select gate region. The method further includes sequentially patterning the hard mask layer and the stack layer to form word lines in the word line region and a select gate in the select gate region, respectively. There is a first spacing between the word lines, and a second spacing between the select gate and the first word line of the word lines closest to the select gate. The second spacing is greater than the first spacing.Type: ApplicationFiled: March 28, 2024Publication date: February 27, 2025Applicant: Winbond Electronics Corp.Inventors: Cheng-Hong WEI, Tseng-Yao PAN
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Publication number: 20250063439Abstract: Methods, systems, and devices for wireless communications are described. Some wireless communications systems may support inter-frequency measurement techniques. A user equipment (UE) may receive a control message indicating respective measurement configurations for multiple measurement objects. The UE may perform a measurement of a first measurement object from the plurality of measurement objects and transmit a first measurement report for the first measurement object in accordance with a measurement order. In other examples, the UE may perform measurements of each of the multiple measurement objects, including the first measurement object, prior to transmitting the measurement report, where respective measurement reports may be transmitted in accordance with the measurement order. In any case, the measurement order may be determined using a set of parameters corresponding to a current state of the UE, one or more services at the UE, a user preference, or any combination thereof.Type: ApplicationFiled: March 2, 2022Publication date: February 20, 2025Inventors: Haojun WANG, Kaikai YANG, Jinglin ZHANG, Zhenqing CUI, Hong WEI, Tom CHIN
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Patent number: 12230603Abstract: A method of fabricating a semiconductor chip includes the following steps. A bonding material layer is formed on a first wafer substrate and is patterned to form a first bonding layer having a strength adjustment pattern. A semiconductor component layer and a first interconnect structure layer are formed on a second wafer substrate. The first interconnect structure layer is located. A second bonding layer is formed on the first interconnect structure layer. The second wafer substrate is bonded to the first wafer substrate by contacting the second bonding layer with the first bonding layer. A bonding interface of the second bonding layer and the first bonding layer is smaller than an area of the second bonding layer. A second interconnect structure layer is formed on the semiconductor component layer. A conductor terminal is formed on the second interconnect structure layer.Type: GrantFiled: July 26, 2023Date of Patent: February 18, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hong-Wei Chan, Jiing-Feng Yang, Yung-Shih Cheng, Yao-Te Huang, Hui Lee
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Patent number: 12193344Abstract: A RRAM and its manufacturing method are provided. The RRAM includes a first dielectric layer formed on a substrate, and two memory cells. The two memory cells include two bottom electrode structures separated from each other. Each bottom electrode structure fills one of two trenches in the first dielectric layer. The two memory cells also include a resistance switching layer and a top electrode structure. The resistance switching layer is conformally formed on the surface of an opening in the first dielectric layer, and the opening is between the two trenches. The top electrode structure is on the resistance switching layer and fills the opening. A top surface of the first dielectric layer, top surfaces of the bottom electrode structures, a top surface of the resistance switching layer, and a top surface of the top electrode structure are coplanar.Type: GrantFiled: August 21, 2023Date of Patent: January 7, 2025Assignee: WINBOND ELECTRONICS CORPInventors: Cheng-Hong Wei, Chien-Hsiang Yu, Hung-Sheng Chen
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Patent number: 12189515Abstract: Examples described herein provide a computer-implemented method for identifying regression test failures that includes comparing a base code to a new code to locate an updated aspect of a program. The method further includes inserting debug code into corresponding source files for each of the base code and the new code for the updated aspect. The method further includes building a first image for the base code and a second image for the new code, the first and second images running in respective first and second containers. The method further includes comparing debugging outputs from a regression test of the respective first and second containers to identify a regression test failure. The method further includes implementing a corrective action to correct the regression test failure.Type: GrantFiled: January 18, 2022Date of Patent: January 7, 2025Assignee: International Business Machines CorporationInventors: Xiao-Yu Li, Hua Wei Fan, Jiangang Deng, Hong Wei Sun, Xiao Ling Chen, Wen Ji Huang
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Patent number: 12183040Abstract: The panoramic surround view system in the vehicle can control the projection device of the vehicle to project the preset pattern on the ground around the vehicle, acquire the plurality of target photographs including the preset pattern, and generate the target calibrating data of the surround view cameras according to the plurality of target photographs, so that the surround view cameras of the panoramic surround view system can be calibrated by using the target calibrating data to obtain the panoramic surround view image. Therefore, when the user needs to re-calibrate the calibrating data of the image splicing of the panoramic surround view system of the vehicle, the calibrating process can be completed by only by using the projection device of the vehicle, without using a special calibrating site and equipment, thus simplifying the calibrating operation steps and saving time.Type: GrantFiled: April 19, 2021Date of Patent: December 31, 2024Assignee: GREAT WALL MOTOR COMPANY LIMITEDInventors: Fuhai Duan, Shuli Li, Bo Gao, Tong Gao, Hong Wei, Zhichao Fan, Dongchun Xu, Peng Hao, Bingxu Ma, Jianzhang Yang, Rongchang Xu, Chong Wang
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Publication number: 20240395728Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming an interconnect structure over a device wafer. The device wafer includes a first integrated circuit, a semiconductor substrate, and a redistribution structure. The method further includes forming a metallization layer and a group of dummy insertion structures having a stepped pattern density in a topmost dielectric layer of the interconnect structure. The group of dummy insertion structures and the metallization layer are planarized with the dielectric layer. The method further includes forming a first bonding layer over the group of dummy insertion structures, the metallization layer, and the dielectric layer. The method further includes bonding a carrier wafer to the first bonding layer, forming an opening through the semiconductor substrate, and forming a conductive via in the opening and electrically coupled to the redistribution structure.Type: ApplicationFiled: July 31, 2024Publication date: November 28, 2024Inventors: Yao-Te Huang, Hong-Wei Chan, Yung-Shih Cheng, Jiing-Feng Yang, Hui Lee
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Publication number: 20240387630Abstract: A method includes forming a transistor over a front side of a substrate; forming a front-side interconnect structure over the transistor, the front-side interconnect structure comprising layers of conductive lines, and conductive vias interconnecting the layers of conductive lines; forming a first bonding layer over the front-side interconnect structure; forming a second bonding layer over a carrier substrate; bonding the front-side interconnect structure to the carrier substrate by pressing the first bonding layer against the second bonding layer; and forming a backside interconnect structure over a backside of the substrate after bonding the front-side interconnect structure to the carrier substrate.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guan-Yao TU, Su-Jen SUNG, Tze-Liang LEE, Hong-Wei CHAN
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Publication number: 20240378104Abstract: A method, system and computer program product for diagnosing a malfunctioning or misused electronic device is disclosed. The method includes performing analytics on at least one of video and audio to automatically detect at least one anomaly exhibited by the electronic device or exhibited in relation to user interaction with the electronic device, the at least one anomaly being distinguishable from other non-present anomalies detectable by a computer system that carries out the performing of the analytics.Type: ApplicationFiled: May 10, 2023Publication date: November 14, 2024Inventors: REXY PRAKASH CHACKO, MURALI KUYIMBIL, AINA AZIZ, HONG WEI LIM
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Patent number: 12142574Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming an interconnect structure over a device wafer. The device wafer includes a first integrated circuit, a semiconductor substrate, and a redistribution structure. The method further includes forming a metallization layer and a group of dummy insertion structures having a stepped pattern density in a topmost dielectric layer of the interconnect structure. The group of dummy insertion structures and the metallization layer are planarized with the dielectric layer. The method further includes forming a first bonding layer over the group of dummy insertion structures, the metallization layer, and the dielectric layer. The method further includes bonding a carrier wafer to the first bonding layer, forming an opening through the semiconductor substrate, and forming a conductive via in the opening and electrically coupled to the redistribution structure.Type: GrantFiled: July 30, 2021Date of Patent: November 12, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yao-Te Huang, Hong-Wei Chan, Yung-Shih Cheng, Jiing-Feng Yang, Hui Lee
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Publication number: 20240371757Abstract: A method of forming a semiconductor device includes forming a conductive feature and a first punch stop layer, where the conductive feature has a first top surface, and where the first punch stop layer has a second top surface that is substantially level with the first top surface. The method further includes forming a resistive element over the first punch stop layer. The method further includes etching through a first portion of the resistive element to form a first trench that exposes both the second top surface of the first punch stop layer and a first sidewall surface of the resistive element. The method further includes forming a first conductive via within the first trench, where the first conductive via contacts the first sidewall surface of the resistive element.Type: ApplicationFiled: July 14, 2024Publication date: November 7, 2024Inventors: Hong-Wei CHAN, Yung-Shih CHENG, Wen-Sheh HUANG
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Publication number: 20240336651Abstract: A method for manufacturing a glass-based biosensor is used to solve the problem of the use of a solution containing a strong acid or a strong base or of an oxygen plasma treatment. The method comprises modifying a silicon-containing substrate by an alcohol solution to form negative charges on at least one coupling surface of the silicon-containing substrate. A least one active layer of polymer having positive charges is formed on the at least one surface of the silicon-containing substrate, respectively. Each of the at least one active layer of polymer has a coupling surface and an active surface opposite to the coupling surface, and the at least one active layer of polymer couples to the silicon-containing substrate via the coupling surface. A plurality of capture biomolecules couples to the active surface.Type: ApplicationFiled: June 20, 2024Publication date: October 10, 2024Inventors: Hong-Wei Yang, Nan-Si Li, Ying-Pei Hsu, Hao-Han Pang
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Publication number: 20240331604Abstract: A method includes controlling an integrated camera of a mobile device to detect a plurality of fiducial markers displayed as part of a test pattern on a display surface of a color display device, wherein the test pattern is one of a plurality of test patterns, estimating a position of the integrated camera relative to the display surface, using the plurality of fiducial markers, augmenting a live image of the test pattern on a display of the mobile device with an overlay, controlling, in response to a position of the overlay being aligned on the display of the mobile device with the live image of the test pattern, the integrated camera to capture an image of the test pattern, and calculating an adjustment to a color setting of the color display device, wherein the adjustment is calculated using information extracted from the image.Type: ApplicationFiled: March 30, 2023Publication date: October 3, 2024Inventors: Heath Barber, Kostenko Yevhen Andriyovych, Hong Wei
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Patent number: 12094930Abstract: A method includes forming a transistor over a front side of a substrate; forming a front-side interconnect structure over the transistor, the front-side interconnect structure comprising layers of conductive lines, and conductive vias interconnecting the layers of conductive lines; forming a first bonding layer over the front-side interconnect structure; forming a second bonding layer over a carrier substrate; bonding the front-side interconnect structure to the carrier substrate by pressing the first bonding layer against the second bonding layer; and forming a backside interconnect structure over a backside of the substrate after bonding the front-side interconnect structure to the carrier substrate.Type: GrantFiled: September 20, 2021Date of Patent: September 17, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guan-Yao Tu, Su-Jen Sung, Tze-Liang Lee, Hong-Wei Chan
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Patent number: 12074107Abstract: A method of forming a semiconductor device includes forming a conductive feature and a first punch stop layer, where the conductive feature has a first top surface, and where the first punch stop layer has a second top surface that is substantially level with the first top surface. The method further includes forming a resistive element over the first punch stop layer. The method further includes etching through a first portion of the resistive element to form a first trench that exposes both the second top surface of the first punch stop layer and a first sidewall surface of the resistive element. The method further includes forming a first conductive via within the first trench, where the first conductive via contacts the first sidewall surface of the resistive element.Type: GrantFiled: July 20, 2022Date of Patent: August 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hong-Wei Chan, Yung-Shih Cheng, Wen-Sheh Huang
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Patent number: D1053621Type: GrantFiled: May 13, 2024Date of Patent: December 10, 2024Inventor: Hong Wei