Patents by Inventor Hong-wei Chen

Hong-wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240146906
    Abstract: A computer system acquires a video bitstream. The video bitstream includes data associated with multiple encoded pictures. Each encoded picture includes one or more coding units (CUs). While decoding a current CU of a picture in the video bitstream, the current CU having a plurality of reference subblocks located in one or more reference pictures, in accordance with a determination that the plurality of reference subblocks satisfy a first set of predefined conditions for enabling a subblock-based temporal motion vector prediction (SbTMVP) mode, the computer system retrieves, from the video bitstream, syntax elements associated with the SbTMVP mode. The computer system then decodes the current CU using the retrieved syntax elements associated with the SbTMVP mode.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Applicant: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Che-Wei KUO, Xiaoyu XIU, Yi-Wen CHEN, Xianglin WANG, Hong-Jheng JHU, Wei CHEN, Ning YAN, Bing YU
  • Publication number: 20240114810
    Abstract: A semiconductor structure includes: an etch-stop dielectric layer overlying a substrate and including a first opening therethrough; a silicon oxide plate overlying the etch-stop dielectric layer and including a second opening therethrough; a first conductive structure including a first electrode and extending through the second opening and the first opening; a memory film contacting a top surface of the first conductive structure and including a material that provides at least two resistive states having different electrical resistivity; and a second conductive structure including a second electrode and contacting a top surface of the memory film.
    Type: Application
    Filed: April 20, 2023
    Publication date: April 4, 2024
    Inventors: Fu-Ting Sung, Jhih-Bin Chen, Hung-Shu Huang, Hong Ming Liu, Hsia-Wei Chen, Yu-Wen Liao, Wen-Ting Chu
  • Patent number: 11923295
    Abstract: A semiconductor structure includes a first dielectric layer over a first conductive line and a second conductive line, a high resistance layer over a portion of the first dielectric layer, a second dielectric layer on the high resistance layer, a low-k dielectric layer over the second dielectric layer, a first conductive via extending through the low-k dielectric layer and the second dielectric layer, and a second conductive via extending through the low-k dielectric layer and the first dielectric layer to the first conductive line. The first conductive via extends into the high resistance layer.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hong-Wei Chan, Yung-Shih Cheng, Wen-Sheh Huang, Yu-Hsiang Chen
  • Publication number: 20210028294
    Abstract: The present disclosure is directed to formation of a low-k spacer. For example, the present disclosure includes an exemplary method of forming the low-k spacer. The method includes depositing the low-k spacer and subsequently treating the low-k spacer with a plasma and/or a thermal anneal. The low-k spacer can be deposited on a structure protruding from the substrate. The plasma and/or thermal anneal treatment on the low-k spacer can reduce the etch rates of the spacer so that the spacer is etched less in subsequent etching or cleaning processes.
    Type: Application
    Filed: October 12, 2020
    Publication date: January 28, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiu-Yu KANG, Hong-Wei Chen
  • Patent number: 10804373
    Abstract: The present disclosure is directed to formation of a low-k spacer. For example, the present disclosure includes an exemplary method of forming the low-k spacer. The method includes depositing the low-k spacer and subsequently treating the low-k spacer with a plasma and/or a thermal anneal. The low-k spacer can be deposited on a structure protruding from the substrate. The plasma and/or thermal anneal treatment on the low-k spacer can reduce the etch rates of the spacer so that the spacer is etched less in subsequent etching or cleaning processes.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: October 13, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiu-Yu Kang, Hong-Wei Chen
  • Publication number: 20190341466
    Abstract: The present disclosure is directed to formation of a low-k spacer. For example, the present disclosure includes an exemplary method of forming the low-k spacer. The method includes depositing the low-k spacer and subsequently treating the low-k spacer with a plasma and/or a thermal anneal. The low-k spacer can be deposited on a structure protruding from the substrate. The plasma and/or thermal anneal treatment on the low-k spacer can reduce the etch rates of the spacer so that the spacer is etched less in subsequent etching or cleaning processes.
    Type: Application
    Filed: July 22, 2019
    Publication date: November 7, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiu-Yu KANG, Hong-Wei Chen
  • Patent number: 10361282
    Abstract: The present disclosure is directed to formation of a low-k spacer. For example, the present disclosure includes an exemplary method of forming the low-k spacer. The method includes depositing the low-k spacer and subsequently treating the low-k spacer with a plasma and/or a thermal anneal. The low-k spacer can be deposited on a structure protruding from the substrate. The plasma and/or thermal anneal treatment on the low-k spacer can reduce the etch rates of the spacer so that the spacer is etched less in subsequent etching or cleaning processes.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: July 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiu-Yu Kang, Hong-Wei Chen
  • Publication number: 20180323276
    Abstract: The present disclosure is directed to formation of a low-k spacer. For example, the present disclosure includes an exemplary method of forming the low-k spacer. The method includes depositing the low-k spacer and subsequently treating the low-k spacer with a plasma and/or a thermal anneal. The low-k spacer can he deposited on a structure protruding from the substrate. The plasma and/or thermal anneal treatment on the low-k spacer can reduce the etch rates of the spacer so that the spacer is etched less in subsequent etching or cleaning processes.
    Type: Application
    Filed: May 8, 2017
    Publication date: November 8, 2018
    Inventors: Hsiu-Yu KANG, Hong-Wei CHEN
  • Publication number: 20150156193
    Abstract: Embodiments are directed to managing shared certificates of a role certificate store, accessing and implementing certificates provided by a role certificate store and to managing role-based shared certificates using a role certificate store. In one scenario, a computer system establishes a role certificate store. The role certificate store is configured to store role-based shared certificates, where each role-based shared certificate corresponds to instances of a specified role. The computer system receives a request for a role-based shared certificate from an instance of the specified role, where the request is redirected from a local data store to the role certificate store. The computer system then verifies that the request was received from an instance of the specified role and sends the requested role-based shared certificate to the role instance.
    Type: Application
    Filed: December 2, 2013
    Publication date: June 4, 2015
    Applicant: Microsoft Corporation
    Inventor: Hong Wei Chen
  • Patent number: 6832422
    Abstract: An apparatus for assembling a post-CMP cleaning brush. The post-CMP cleaning brush is provided with a brush core and an outer brush, and the outer brush is provided with a hollow portion. The apparatus comprises a base, a fixed member, a sliding member, a plurality of posts, and an actuating device. The base holds the brush core and the outer brush, and the fixed member is disposed on the base. The sliding member is disposed on the base in a manner such that it is located at the opposite side of the fixed member relative to the outer brush disposed on the base. The posts, disposed on the sliding member, pass through the fixed member and the hollow portion of the outer brush so as to assist the brush core in passing through the hollow portion of the outer brush. The actuating device connects with the brush core so as to pass the brush core through the hollow portion of the outer brush and separate the posts, inserted into the outer brush, from the outer brush.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: December 21, 2004
    Assignee: Nanya Technology Corporation
    Inventors: Ming Fa Tsai, Chia Chi Lin, Shih Hsien Hsu, Chih-Feng Wang, Hong-wei Chen
  • Publication number: 20030124857
    Abstract: An apparatus for assembling a post-CMP cleaning brush. The post-CMP cleaning brush is provided with a brush core and an outer brush, and the outer brush is provided with a hollow portion. The apparatus comprises a base, a fixed member, a sliding member, a plurality of posts, and an actuating device. The base holds the brush core and the outer brush, and the fixed member is disposed on the base. The sliding member is disposed on the base in a manner such that it is located at the opposite side of the fixed member relative to the outer brush disposed on the base. The posts, disposed on the sliding member, pass through the fixed member and the hollow portion of the outer brush so as to assist the brush core in passing through the hollow portion of the outer brush. The actuating device connects with the brush core so as to pass the brush core through the hollow portion of the outer brush and separate the posts, inserted into the outer brush, from the outer brush.
    Type: Application
    Filed: May 21, 2002
    Publication date: July 3, 2003
    Inventors: Ming Fa Tsai, Chia Chi Lin, Shih Hsien Hsu, Chih-Feng Wang, Hong-wei Chen
  • Patent number: D1024051
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: Hui-Jung Huang, Hong-Kuan Li, I-Lun Li, Ling-Mei Kuo, Kuan-Ju Chen, Fang-Ying Huang, Kai-Hung Huang, Szu-Wei Yang, Kai-Teng Cheng