Abstract: An array substrate of an LCD having: a gate line formed along a first direction;a data line formed along a second direction crossing the first direction;first and second pixel electrodes spaced apart from each other;a thin-film transistor includes a gate electrode connected to the gate line; a source electrode connected to the data line and partially overlapping the second pixel electrode; and a drain electrode connected to the first pixel electrode spaced apart from the second pixel electrode along the second direction. The source electrode or the gate electrode overlaps the second pixel electrode but the drain electrode does not overlap the second pixel electrode. Electrical coupling between the first and second pixel electrodes are avoided with such configuration.

Abstract: The present invention relates to a method for manufacturing an ultra low defect semiconductor single crystalline ingot, which uses a Czochralski process for growing a semiconductor single crystalline ingot through a solid-liquid interface by dipping a seed into a semiconductor melt received in a quartz crucible and slowly pulling up the seed while rotating the seed, wherein a defect-free margin is controlled by increasing or decreasing a heat space on a surface of the semiconductor melt according to change in length of the single crystalline ingot as progress of the single crystalline ingot growth process.

Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.

Abstract: An array substrate of an LCD having: a gate line formed along a first direction; a data line formed along a second direction crossing the first direction; first and second pixel electrodes spaced apart from each other; a thin-film transistor includes a gate electrode connected to the gate line; a source electrode connected to the data line and partially overlapping the second pixel electrode; and a drain electrode connected to the first pixel electrode spaced apart from the second pixel electrode along the second direction. The source electrode or the gate electrode overlaps the second pixel electrode but the drain electrode does not overlap the second pixel electrode. Electrical coupling between the first and second pixel electrodes are avoided with such configuration.

Abstract: An embodiment of the present invention relates to a method and apparatus for correcting errors in stereo images. The apparatus for correcting errors in stereo images according to an embodiment of the present invention comprises: a space histogram generation unit generating space histogram information using the depth map information on the input image data; a peak frequency generation unit generating a peak frequency using the 2D image data of the input image data; an object analysis unit determining the error in each frame of the input image data on the basis of the space histogram and peak frequency; a depth map error correction unit correcting the depth map information to reduce the error; and a rendering processing unit generating left and right eye images, which are stereo images, by using the corrected depth map information.

Abstract: A multi physical properties part used in automotive components required to be lightweight and provide collision safety, and a method of manufacturing a multi physical properties part, in which the multi physical properties part may be more economically and simply manufactured by using two or more separated die sets without using an additional heating device or treating a die surface. A method of manufacturing a multi physical properties part, which includes positioning a single heated formed article in two or more die sets, and then manufacturing a multi physical properties part including two or more regions having different physical properties by differing cooling conditions in the respective die set.

Abstract: A mobile phone to transmit and receive a radio frequency signal through a first antenna and a second antenna in a radio communication system includes a first radio frequency signal receiving unit to convert the radio frequency signal received through the first antenna into a baseband signal to be transmitted to a controller, a second radio frequency signal receiving unit to convert the radio frequency signal received through the second antenna into a baseband signal to be transmitted to the controller, and a radio frequency signal transmitting unit to convert a baseband signal transmitted from the controller into a radio frequency signal, to distribute the radio frequency signal, and to selectively output the distributed radio frequency signal to the first antenna and the second antenna.

Abstract: An underbody for an electric vehicle configured as an electric vehicle lower body includes a multiply divided battery mounting portion and an underbody portion. The multiply divided battery mounting portion enables multiply divided and selective mounting of batteries, and forms a portion of the underbody. The underbody portion is connected to the battery mounting portion and forms another portion of the underbody.

Abstract: A display panel includes a gate driver connected to a gate line, where the gate driver includes a plurality of stages, where each of the stages includes at least one dual gate thin film transistor having a first control terminal and a second control terminal, and where each of the stages receives a clock signal, a first low voltage, a second low voltage, at least one transmission signal of previous stages, at least two transmission signals of subsequent stages and an output control signal from one of the stages to output a gate voltage including a gate-on voltage and a gate-off voltage.

Abstract: A display device includes an insulation substrate; a plurality of gate lines arranged on the insulation substrate in a first direction and including first group of gate lines and second group of gate lines; a plurality of data lines insulated from and crossing the plurality of gate lines; a gate driver applying gate-on voltages to the plurality of gate lines; and a data driver applying data voltages to the plurality of data lines, wherein at least one of the first group of gate lines is arranged between the second group of gate lines and the gate driver applies the gate-on voltages to the first group of gate lines during the first half of a frame and the gate-on voltages to the second group of gate lines during the second half of the frame.

Abstract: One embodiment of the present invention relates to a method and a apparatus for converting a three-dimensional image using depth map information. The apparatus comprise a depth map estimation unit which estimates the depth map information for each pixel present in each frame of input image data, a depth map application unit which moves each pixel by the depth map information in the X-axis direction, a 3D image interpolation unit which, when a blank pixel occurs in the frame due to the movement, forms an interpolated pixel in the blank pixel by applying a weight to adjacent pixels of the blank pixel, and a 3D image rendering processing unit which renders a left-eye image and a right-eye image to which the interpolated pixel is applied.

Abstract: A display substrate includes a first switching element, a second switching element, a first pixel electrode, a second pixel electrode, a main storage electrode and a sub-storage electrode. The first switching element is connected to a data line and a first gate line. The second switching element is connected to the data line and a second gate line adjacent to the first gate line. The first pixel electrode is electrically connected to the first switching element. The second pixel electrode is electrically connected to the second switching element. The main storage electrode is disposed in an area between the first pixel electrode and the second electrode to overlap with first ends of the first and second pixel electrodes. The sub-storage electrode is spaced apart from the first and second gate lines.

Abstract: An embodiment of the present invention relates to a method and apparatus for correcting errors in stereo images. The apparatus for correcting errors in stereo images according to an embodiment of the present invention comprises: a space histogram generation unit generating space histogram information using the depth map information on the input image data; a peak frequency generation unit generating a peak frequency using the 2D image data of the input image data; an object analysis unit determining the error in each frame of the input image data on the basis of the space histogram and peak frequency; a depth map error correction unit correcting the depth map information to reduce the error; and a rendering processing unit generating left and right eye images, which are stereo images, by using the corrected depth map information.

Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.

Abstract: A mobile phone to transmit and receive a radio frequency signal through a first antenna and a second antenna in a radio communication system includes a first radio frequency signal receiving unit to convert the radio frequency signal received through the first antenna into a baseband signal to be transmitted to a controller, a second radio frequency signal receiving unit to convert the radio frequency signal received through the second antenna into a baseband signal to be transmitted to the controller, and a radio frequency signal transmitting unit to convert a baseband signal transmitted from the controller into a radio frequency signal, to distribute the radio frequency signal, and to selectively output the distributed radio frequency signal to the first antenna and the second antenna.

Abstract: A gate driving circuit and a display device having the same, a pull-up unit pulls up a current gate signal by using a first clock signal during a first period of one frame. A pull-up driver coupled to the pull-up unit receives a carry signal from one of the previous stages to turn on the pull-up unit. A pull-up unit receives a gate signal from one of the next stages, discharges the current gate signal to an off voltage level, and turns off the pull-up unit. A holder holds the current gate signal at the voltage level. An inverter turns on/off the holder in response to a first clock signal. A ripple preventer has a source and a gate coupled in common to an output terminal of the pull-up unit and a drain coupled to an input terminal of the inverter, and includes a ripple preventing diode for preventing a ripple from being applied to the inverter.

Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.

Abstract: A mobile phone to transmit and receive a radio frequency signal through a first antenna and a second antenna in a radio communication system includes a first radio frequency signal receiving unit to convert the radio frequency signal received through the first antenna into a baseband signal to be transmitted to a controller, a second radio frequency signal receiving unit to convert the radio frequency signal received through the second antenna into a baseband signal to be transmitted to the controller, and a radio frequency signal transmitting unit to convert a baseband signal transmitted from the controller into a radio frequency signal, to distribute the radio frequency signal, and to selectively output the distributed radio frequency signal to the first antenna and the second antenna.

Abstract: A gate driving circuit includes stages, the stages being cascaded and each including: a pull-up part which pulls up a gate voltage to a clock signal during a horizontal scanning period (1H); a carry part which pulls up a carry voltage to the clock signal during the horizontal scanning period (1H); a pull-up driving part connected to a control terminal (Q-node) common to the carry part and the pull-up part and which receives a previous carry voltage from a first previous stage to turn on the pull-up part and the carry part; and a ripple preventing part which prevents a ripple generated at a previous Q-node of a second previous stage based on a ripple generated at the Q-node of the carry part and the pull-up part.

Abstract: Disclosed is a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer interposed there between. The first substrate is provided with gate lines and data lines thereon. The gate lines and data lines cross with each other and are insulated from each other. Pixel electrodes are stacked on the gate lines and data lines. Each pixel electrode includes first and second sub-pixel electrodes spaced apart from each other and a connection electrode, which connects the first sub-pixel electrode to the second sub-pixel electrode. The second substrate is provided with a common electrode thereon. The common electrode includes a first domain divider formed on the center of the first sub-pixel electrode and a second domain divider formed on the center of the second sub-pixel electrode.