Abstract: An electrostatic discharge (ESD) protection circuit includes a first power line; a second power line; a ground line; two stack transistors connected in series between the first power line and the ground line; a first resistor connected between the first power line and a first node; a first transistor and a capacitor connected in series between the first node and the ground line; a second transistor connected between the second power line and a second node; a third transistor connected between the first power line and a third node; an inverter, connected between the third node and the ground line, and having an input connected to the second node; a fourth transistor, connected to the first power line, and having a gate connected to the second node; and a fifth transistor, connected between the second power line and the third node, and having a gate connected to a terminal of the fourth transistor.