Abstract: Disclosed is a method of analyzing abnormal behavior by using data imaging, including: receiving data to be analyzed as an input, wherein the data to be analyzed is related to a state of a system to be analyzed; converting the inputted data to be analyzed into image data; training a neural network unit with the converted image data as an input; and detecting or predicting abnormal behavior in the system to be analyzed, at the neural network unit, which has received the image data converted from the data to be analyzed as the input and completed training.

Abstract: An AI-based malware detection method is provided. The method includes inputting malware binary data, extracting metadata from the inputted malware binary data, converting the extracted metadata into image data, and training a neural network on the converted image data to classify malware. Malware binary data can be effectively classified by converting the binary data to image data and analyzed through deep learning-based image models. In addition, results from the AI detection algorithm technology can be displayed visually for easy interpretation.

Abstract: Disclosed is a method of analyzing abnormal behavior by using data imaging, including: receiving data to be analyzed as an input, wherein the data to be analyzed is related to a state of a system to be analyzed; converting the inputted data to be analyzed into image data; training a neural network unit with the converted image data as an input; and detecting or predicting abnormal behavior in the system to be analyzed, at the neural network unit, which has received the image data converted from the data to be analyzed as the input and completed training.

Abstract: An AI-based malware detection method is disclosed. According to the present disclosure, said method includes inputting malware binary data, extracting metadata from the inputted malware binary data, converting the extracted metadata into image data, and training a neural network on the converted image data to classify malware. According to the present disclosure, malware binary data can be effectively classified by converting said binary data to image data and analyzed through deep learning-based image models. In addition, results from said AI detection algorithm technology can be displayed visually for easy interpretation.

Abstract: A piezoelectric element driving apparatus may apply a predetermined driving signal to a piezoelectric element to drive the piezoelectric element. The driving signal may be an asymmetrical waveform in which amplitudes of first and second polarities thereof are different from each other. An exemplary embodiment in the present disclosure may provide a piezoelectric element driving apparatus and method having a high output while protecting dielectric characteristics of a piezoelectric element by driving the piezoelectric element using an asymmetrical driving signal.

Abstract: A piezoelectric shock sensor includes a lower cover, a piezoelectric element in which first and second piezoelectric sheets are stacked, and an upper cover. Each of the first and second piezoelectric sheets has a cantilever portion and a frame portion formed integrally with each other. First and second internal electrodes are formed on the first and second piezoelectric sheets, respectively. First and second lead portions, respectively electrically connected to the first and second internal electrodes, are exposed through opposing side surfaces of the piezoelectric element.

Abstract: A piezoelectric ceramic composition comprises a basic composition of (1-x)Pb(Mg1/2W1/2)0.03(Ni1/3Nb2/3)0.09(ZryTi1-y)0.88O3+xBiFeO3, wherein x=0 or 0.015 y=0.47-0.53, and at least one sintering aid of LiCO3, CaCO3, PbO, CuO and Fe2O3, a piezoelectric element comprising the composition, and a method for preparing the same. The piezoelectric ceramic composition allows low temperature sintering and the piezoelectric ceramics prepared therefrom improves structural property, piezoelectric property and dielectric property.

Abstract: A piezoelectric element driving apparatus may apply a predetermined driving signal to a piezoelectric element to drive the piezoelectric element. The driving signal may be an asymmetrical waveform in which amplitudes of first and second polarities thereof are different from each other. An exemplary embodiment in the present disclosure may provide a piezoelectric element driving apparatus and method having a high output while protecting dielectric characteristics of a piezoelectric element by driving the piezoelectric element using an asymmetrical driving signal.

Abstract: The present invention relates to a piezoelectric material for low sintering and more particularly, to piezoelectric materials for low sintering having a composition formula of Pb(Zr, Ti)O3—Pb(Ni, Nb)O3 (hereinafter referring to as ‘PZT-PNN’). The PZT-PNN piezoelectric material according to the present invention shows excellent piezoelectric properties compared to the convention piezoelectric materials even at a low sintering temperature of 950° C. or lower. It thus allows reducing manufacturing cost by using relatively lower-cost electrode materials than Pd or Pt and increasing reliability of operation temperature through improving the glass transition temperature.

Abstract: There is provided a device for electronic components including: a tray provided with electronic components formed by stacking dielectric sheets on which inner conductors are formed; a transfer unit continuously transferring the electronic components moved from the tray; and a magnetic field providing unit providing a magnetic field to the electronic components moved from the transfer unit to align the inner conductors in a direction in which the magnetic field and magnetic resistance are reduced.

Abstract: Provided is an electrode pad for mounting an electronic component on a surface of a circuit board. The electrode pad includes first and second electrode parts facing each other, and third and fourth electrode parts facing each other. The third and fourth electrode parts are disposed adjacent to the first and second electrode parts for forming corners of the electrode pad together with the first and second electrode parts. At least one of the first to fourth electrode parts includes a chamfered surface formed by cutting a corner of the at least one of the first to fourth electrode parts forming the corner of the electrode pad. Therefore, when the electrode pad is used for mounting an electronic component, the width of an outer electrode of the electronic component can be sufficiently increased, and thus the shape or size of the outer electrode can be easily adjusted.

Abstract: A circuit board device includes a circuit board comprising a mounting area, and first and second power lines and a ground pad formed on the mounting area, and a vertical multilayer chip capacitor (MLCC) comprising a capacitor body, a plurality of first and second polarity inner electrodes, first and second outer electrodes, and a third outer electrode, wherein the first and second power lines are separately disposed on the mounting area, connected to the first and second outer electrodes, and electrically connected to each other only by the vertical MLCC, and the ground pad is disposed between the first and second power lines and connected to the third outer electrode.

Abstract: A circuit board device includes a circuit board comprising a mounting area, and first and second power lines and a ground pad formed on the mounting area, and a vertical multilayer chip capacitor (MLCC) comprising a capacitor body, a plurality of first and second polarity inner electrodes, first and second outer electrodes, and a third outer electrode, wherein the first and second power lines are separately disposed on the mounting area, connected to the first and second outer electrodes, and electrically connected to each other only by the vertical MLCC, and the ground pad is disposed between the first and second power lines and connected to the third outer electrode.

Abstract: A multilayer chip capacitor includes: a capacitor body having a plurality of dielectric layers laminated therein and comprising first and second capacitor units; and first to fourth external electrodes formed on an outer surface of the capacitor body, wherein the first capacitor unit comprises first and second internal electrodes facing each other with the dielectric layer interposed therebetween, connected to the first and second external electrodes, and having different polarities, each pair of first and second internal electrodes being laminated one or more times to discriminate a plurality of capacitors with a certain capacitance, the second capacitor unit comprises third and fourth internal electrodes facing each other with the dielectric layer interposed therebetween, connected to the third and fourth external electrodes, and having the same polarities as those of the first and second internal electrodes, each pair of third and fourth internal electrodes being laminated one or more times to discriminate

Abstract: A multilayer chip capacitor includes: a capacitor body having a plurality of dielectric layers laminated therein and comprising first and second capacitor units; and first to fourth external electrodes formed on an outer surface of the capacitor body, wherein the first capacitor unit comprises first and second internal electrodes facing each other with the dielectric layer interposed therebetween, connected to the first and second external electrodes, and having different polarities, each pair of first and second internal electrodes being laminated one or more times to discriminate a plurality of capacitors with a certain capacitance, the second capacitor unit comprises third and fourth internal electrodes facing each other with the dielectric layer interposed therebetween, connected to the third and fourth external electrodes, and having the same polarities as those of the first and second internal electrodes, each pair of third and fourth internal electrodes being laminated one or more times to discriminate

Abstract: Provided is an electrode pad for mounting an electronic component on a surface of a circuit board. The electrode pad includes first and second electrode parts facing each other, and third and fourth electrode parts facing each other. The third and fourth electrode parts are disposed adjacent to the first and second electrode parts for forming corners of the electrode pad together with the first and second electrode parts. At least one of the first to fourth electrode parts includes a chamfered surface formed by cutting a corner of the at least one of the first to fourth electrode parts forming the corner of the electrode pad. Therefore, when the electrode pad is used for mounting an electronic component, the width of an outer electrode of the electronic component can be sufficiently increased, and thus the shape or size of the outer electrode can be easily adjusted.

Abstract: There is provided a multilayer chip capacitor including: a capacitor body including first and second capacitor units; and first to fourth outer electrodes, wherein the first capacitor unit includes at least one pair of first and second inner electrodes, the second capacitor unit includes at least one pair of third and fourth inner electrodes, an alternate laminated portion is formed in one area within the capacitor body, the alternate laminated portion having the first to fourth inner electrodes sequentially laminated therein, and a capacitance adjusting portion is formed in another area within the capacitor body, the capacitance adjusting portion having at least one of the one pair of first and second inner electrodes and the one pair of third and fourth inner electrodes laminated repeatedly.