Patents by Inventor Hong-Yeop Song

Hong-Yeop Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9864550
    Abstract: Provided are a method and an apparatus of recovering and encoding for data recovery in a storage system and a distributed storage system of supporting, when a node storing data is lost in a distributed storage environment, a function to recover the lost node. According to exemplary embodiments of the present invention, in a method of encoding for recovering data loss in a distributed storage system, it is possible to guarantee jointly optimized locality with respect to a loss of two or more specific numbers of nodes and recover data of lost nodes in the distributed storage system by using a smaller number of nodes while using a smaller storage capacity.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: January 9, 2018
    Assignee: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Hong Yeop Song, Jung Hyun Kim
  • Publication number: 20160350188
    Abstract: Provided are a method and an apparatus of recovering and encoding for data recovery in a storage system and a distributed storage system of supporting, when a node storing data is lost in a distributed storage environment, a function to recover the lost node. According to exemplary embodiments of the present invention, in a method of encoding for recovering data loss in a distributed storage system, it is possible to guarantee jointly optimized locality with respect to a loss of two or more specific numbers of nodes and recover data of lost nodes in the distributed storage system by using a smaller number of nodes while using a smaller storage capacity.
    Type: Application
    Filed: March 30, 2016
    Publication date: December 1, 2016
    Inventors: Hong Yeop SONG, Jung Hyun KIM
  • Patent number: 8347172
    Abstract: Disclosed is a decoding method and device for low density parity check codes using dynamic scheduling. The low density parity check codes are sequentially decoded, and the messages are scheduled in the descending order of the difference between values before and after updating the message transmitted from the variable node to the check node.
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: January 1, 2013
    Assignees: Electronics and Telecommunications Research Institute, Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Dong Seung Kwon, Choongil Yeh, Min Sik Seo, Young Seog Song, Byung-Jae Kwak, Ji Hung Kim, Wooram Shin, Hong-Yeop Song, Jung-Hyun Kim, Mi-Young Nam
  • Patent number: 8201030
    Abstract: A method and apparatus for parallel structured Latin square interleaving in a communication system are provided. The method includes dividing input information bits into sub-blocks according to a parallel processing order, generating a first Latin square matrix or a second Latin square matrix by comparing the parallel processing order with a predetermined threshold, and interleaving by reading out the information bits divided into the sub-blocks according to the generated Latin square matrix.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: June 12, 2012
    Assignees: Samsung Electronics Co., Ltd., Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Seul-Ki Bae, Seung-Hee Han, Jong-Hyeuk Lee, Hong-Yeop Song, Dae-Son Kim, Joon-Sung Kim
  • Publication number: 20100153811
    Abstract: Disclosed is a decoding method and device for low density parity check codes using dynamic scheduling. The low density parity check codes are sequentially decoded, and the messages are scheduled in the descending order of the difference between values before and after updating the message transmitted from the variable node to the check node.
    Type: Application
    Filed: July 2, 2009
    Publication date: June 17, 2010
    Applicants: Electronics and Telecommunications Research Institute, Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Dong Seung KWON, Choongil YEH, Min Sik SEO, Young Seog SONG, Byung-Jae KWAK, Ji Hung KIM, Wooram SHIN, Hong-Yeop SONG, Jung-Hyun KIM, Mi-Young NAM
  • Publication number: 20090113271
    Abstract: A method and apparatus for parallel structured Latin square interleaving in a communication system are provided. The method includes dividing input information bits into sub-blocks according to a parallel processing order, generating a first Latin square matrix or a second Latin square matrix by comparing the parallel processing order with a predetermined threshold, and interleaving by reading out the information bits divided into the sub-blocks according to the generated Latin square matrix.
    Type: Application
    Filed: October 30, 2008
    Publication date: April 30, 2009
    Applicants: SAMSUNG ELECTRONICS CO., LTD., INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Seul-Ki Bae, Seung-Hee Han, Jong-Hyeuk Lee, Hong-Yeop Song, Dae-Son Kim, Joon-Sung Kim
  • Publication number: 20080109618
    Abstract: Provided is a parallel interleaving method and apparatus. The parallel interleaving method includes dividing input information bits into a predetermined number of sub-blocks and interleaving the information bits divided into the sub-blocks according to a predetermined first interleaving rule.
    Type: Application
    Filed: November 7, 2007
    Publication date: May 8, 2008
    Applicants: SAMSUNG ELECTRONICS CO. , LTD., Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Dong-Ho Kim, Yung-Soo Kim, Cheol-Woo You, Hong-Yeop Song, Dae-Son Kim, Hyun-Young Oh
  • Publication number: 20070245211
    Abstract: A decoding method in a concatenated low-density generator matrix (LDGM) code-based transmission system for detecting a signal using a parity check matrix including a systematic bit part mapped to systematic bits and a parity check part mapped to parity bits. The decoding method includes generating an outer code parity check matrix with a predetermined size using a pseudorandom algorithm; generating an inner code parity check matrix using the outer code parity check matrix; and decoding a received signal using the inner code parity check matrix.
    Type: Application
    Filed: April 6, 2006
    Publication date: October 18, 2007
    Applicants: SAMSUNG ELECTRONICS CO., LTD., Yonsei University
    Inventors: Joon-Sung Kim, Hong-Yeop Song, Dong-Ho Kim, Cheol-Woo You, Ye-Hoon Lee
  • Publication number: 20050149845
    Abstract: An LDPC encoding method in a digital communication system is provided, in which a parity-check matrix H having a plurality of circulant matrices as elements is first generated. A generation matrix G is generated using the parity-check matrix. Information bits are then encoded using the generation matrix G.
    Type: Application
    Filed: November 8, 2004
    Publication date: July 7, 2005
    Applicants: SAMSUNG ELECTRONICS CO., LTD., YONSEI UNIVERSITY
    Inventors: Min-Ho Shin, Hong-Yeop Song, Seung-Bum Suh, Eoi-Young Choi
  • Publication number: 20040243917
    Abstract: An apparatus and method for improving decoding performance of a Normalized-BP algorithm in an LDPC-code decoder. The present invention to provides an LDPC-code decoding apparatus, which can be implemented in the form of a simpler configuration than the LLR-BP algorithm, and a method for controlling the same. Further, the present invention provides an LDPC-code decoding apparatus, which improves decoding performance of the Normalized-BP algorithm and at the same time provides similar performance to that of the LLR-BP algorithm, and a method for controlling the same.
    Type: Application
    Filed: May 26, 2004
    Publication date: December 2, 2004
    Applicants: SAMSUNG ELECTRONICS CO., LTD., YONSEI UNIVERSITY
    Inventors: Seung-Bum Suh, Hong-Yeop Song, Min-Ho Shin, Joon-Sung Kim
  • Patent number: 6396868
    Abstract: There are provided spread spectrum signal generating devices and methods in a transmitter of a mobile communications system using a plurality of logical channels. In the spread spectrum signal generating devices, a multiplexer time multiplexes a pilot channel signal and a control channel signal which are output at substantially constant power levels. A first orthogonal encoder orthogonally spreads the output of the multiplexer with an orthogonal code. A second orthogonal encoder orthogonally spreads voice channel data of a variable bit rate with an orthogonal code. A third orthogonal encoder orthogonally spreads packet channel data of a variable bit rate with an orthogonal code. An IQ signal mapper adds the outputs of the first and third orthogonal encoders, outputs the added signal as a first channel signal, and outputs the output of the second orthogonal encoder as a second channel signal.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: May 28, 2002
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Soon-Young Yoon, Jae-Min Ahn, Hee-Won Kang, Young-Ky Kim, Jong-Seon No, Hong-Yeop Song, Ha-Bong Chung, Je-Woo Kim
  • Patent number: 6385187
    Abstract: A device and method for generating a pseudo-orthogonal code for use in orthogonally spreading channel data in a CDMA mobile communications system. M orthogonal codes are selected from N orthogonal codes, for forming a pseudo-orthogonal codes, and the elements of the selected M orthogonal codes are sequentially interlaced to generate the pseudo-orthogonal code as a sequence of M×N elements.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: May 7, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Min Ahn, Soon-Young Yoon, Hee-Won Kang, Young-Ky Kim, Jong-Seon No, Hong-Yeop Song, Ha-Bong Chung, Je-Woo Kim