Patents by Inventor Hong Zong

Hong Zong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250213698
    Abstract: the present invention provides novel bicyclic heterocycles and their targeting ligands which can conjugate to a therapeutic agent, for use as medicament. The preparation method thereof, pharmaceutical compositions comprising the therapeutic compounds, and the pharmaceutical uses are disclosed.
    Type: Application
    Filed: March 24, 2023
    Publication date: July 3, 2025
    Inventors: Xiaoyang Guan, Hugh Y. Zhu, Hong Zong
  • Publication number: 20250043283
    Abstract: Provided herein are processes for preparing an oligomer (e.g., a morpholino oligomer). The synthetic processes described herein may be advantageous to scaling up oligomersynthesis while maintaining overall yield and purity of a synthesized oligomer.
    Type: Application
    Filed: June 20, 2024
    Publication date: February 6, 2025
    Inventors: Kyle A. Totaro, Mark D. Simon, Ming Zhou, Hong Zong, Gunnar J. Hanson, Bradley L. Pentelute
  • Patent number: 11404209
    Abstract: An electrical device package structure and manufacturing method thereof is disclosed. The manufacturing method comprises: providing an electrical device body having at least two electrodes, wherein an outer surface of the electrical device body is partially covered by the electrodes, and outer surfaces of the electrodes are covered by a plastic material; forming a first protective layer including phosphate salt at least on the exposed outer surface of the electrical device body; and forming a second protective layer including glass at least on an exposed outer surface of the first protective layer. The present invention can prevent the electrical device body and/or the electrodes from being damaged on their manufacturing process, and avoid a forming high impedance layer on an electrode.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: August 2, 2022
    Assignee: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn Len, Hong Zong Xu, Zhi Xian Xu, Hsing Tsai Huang, Jie-An Zhu
  • Publication number: 20210280373
    Abstract: An electrical device package structure and manufacturing method thereof is disclosed. The manufacturing method comprises: providing an electrical device body having at least two electrodes, wherein an outer surface of the electrical device body is partially covered by the electrodes, and outer surfaces of the electrodes are covered by a plastic material; forming a first protective layer including phosphate salt at least on the exposed outer surface of the electrical device body; and forming a second protective layer including glass at least on an exposed outer surface of the first protective layer. The present invention can prevent the electrical device body and/or the electrodes from being damaged on their manufacturing process, and avoid a forming high impedance layer on an electrode.
    Type: Application
    Filed: July 10, 2020
    Publication date: September 9, 2021
    Inventors: Ching-Hohn Len, Hong Zong Xu, Zhi Xian Xu, Hsing Tsai Huang, Jie-An Zhu
  • Publication number: 20210247638
    Abstract: A smart film apparatus includes a smart film and a control member. The smart film includes a polymer dispersed liquid crystal or a polymer network dispersed liquid crystal between two conductive layers. Plural electrodes are formed on a single surface of one of the conductive layers, and it is easier to process. Two conductive layers that respectively include multitudes electrically isolated conductive units. With floating or ground controlling signal, the control member controls the conductive units to perform a variety of displaying effects. Moreover, the surface opposed to the single surface with electrodes is evenly flat with paste and beneficial to apply to desired target surface.
    Type: Application
    Filed: November 18, 2020
    Publication date: August 12, 2021
    Inventors: Hong Zong LIAO, Ta Jung CHENG, Cheng I CHEN, Li Hua CHU
  • Publication number: 20200362339
    Abstract: Provided herein are processes for preparing an oligomer (e.g., a morpholino oligomer). The synthetic processes described herein may be advantageous to scaling up oligomer synthesis while maintaining overall yield and purity of a synthesized oligomer.
    Type: Application
    Filed: September 25, 2018
    Publication date: November 19, 2020
    Inventors: Kyle A. Totaro, Mark D. Simon, Ming Zhou, Hong Zong, Gunnar J. Hanson, Bradley L. Pentelute
  • Patent number: 9947444
    Abstract: A process for producing a multilayer varistor (MLV) if remained its size unchanged as prior arts is favorable to outstandingly increase overall current-carrying area and improve the performance of final produced MLV; and the MLV has laminated a lower cap, an inner-electrode stack formed from piling up several inner-electrode gaps (g), and an upper cap into a unity, and at least satisfies the condition that the lower cap and the upper cap has a thickness smaller than a thickness of the inner-electrode gap (g), but equal to or greater than 0.1 times of the thickness of the inner-electrode gap (g).
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: April 17, 2018
    Assignee: SFI ELECTRONICS TECHNOLOGY INC.
    Inventors: Ching-Hohn Lien, Jie-An Zhu, Zhi-Xian Xu, Ting-Yi Fang, Hong-Zong Xu
  • Patent number: 9931412
    Abstract: Provided herein is technology relating to theranostic agents and particularly, but not exclusively, to compositions comprising cell-specific theranostic agents and associated methods and systems for using the cell-specific theranostic agents to treat subjects.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: April 3, 2018
    Assignee: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Sascha N. Goonewardena, Bertram Pitt, Hong Zong
  • Publication number: 20180090248
    Abstract: A process for producing a multilayer varistor (MLV) if remained its size unchanged as prior arts is favorable to outstandingly increase overall current-carrying area and improve the performance of final produced MLV; and the MLV has laminated a lower cap, an inner-electrode stack formed from piling up several inner-electrode gaps (g), and an upper cap into a unity, and at least satisfies the condition that the lower cap and the upper cap has a thickness smaller than a thickness of the inner-electrode gap (g), but equal to or greater than 0.1 times of the thickness of the inner-electrode gap (g).
    Type: Application
    Filed: September 20, 2017
    Publication date: March 29, 2018
    Inventors: Ching-Hohn LIEN, Jie-An ZHU, Zhi-Xian XU, Ting-Yi FANG, Hong-Zong XU
  • Patent number: 9691736
    Abstract: A process for producing a miniaturized SMD diode package involves using a diode chip whose bottom surface has a positive electrode and a negative electrode, using a circuit board instead of a conventional lead frame during packaging, and using Charge-Coupled Device (CCD) image registration technology to perform chip bonding; the beneficial advantages brought from the process for producing the same including to simplify producing process and reduce manufacturing cost, to improve accuracy and precision of producing the miniaturized SMD diode package due to using a circuit board instead of conventionally used lead frame, and to ensure the produced miniaturized SMD diode package possesses excellent diode characteristics without distortion or defect.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: June 27, 2017
    Assignee: SFI ELECTRONICS TECHNOLOGY INC.
    Inventors: Ching-Hohn Lien, Xing-Xiang Huang, Hsing-Tsai Huang, Hong-Zong Xu, Yi-Wei Chen
  • Patent number: 9691735
    Abstract: A miniaturized SMD diode package involves using a diode chip whose bottom surface has a positive electrode and a negative electrode, using a circuit board instead of a conventional lead frame during packaging, and using Charge-Coupled Device (CCD) image registration technology to perform chip bonding; the beneficial advantages brought from a process for producing the same including to simplify producing process and reduce manufacturing cost, to improve accuracy and precision of producing the miniaturized SMD diode package due to using a circuit board instead of conventionally used lead frame, and to ensure the produced miniaturized SMD diode package possesses excellent diode characteristics without distortion or defect.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: June 27, 2017
    Assignee: SFI ELECTRONICS TECHNOLOGY INC.
    Inventors: Ching-Hohn Lien, Xing-Xiang Huang, Hsing-Tsai Huang, Hong-Zong Xu, Yi-Wei Chen
  • Patent number: 9684103
    Abstract: A structured light generation device includes a first surface structure and a second surface structure, which are opposed to each other. The first surface structure includes a diffractive optical element. The second surface structure includes a lenticular lens structure. By the diffractive optical element, an incident dot beam is processed into plural dot beams with different sizes and different brightness values. By the lenticular lens structure, the each dot beam is expanded to a linear beam. After the single dot beam is processed by the structured light generation device, a structured light is generated. The structured light generation device can be applied to a projection system with a 3D gesture sensing control or detection device.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: June 20, 2017
    Assignee: AHEAD OPTOELECTRONICS, INC.
    Inventors: Hong-Zong Liao, Ying-Yueh Chang
  • Publication number: 20170131560
    Abstract: A laser diode-DOE module includes a diffractive optical element and a laser light source. The diffractive optical element receives a non-collimated dot beam. The laser light source emits a non-collimated dot beam. Consequently, the spacing distance between the laser light source and the diffractive optical element can be designed as short as possible. Consequently, the total length of the laser diode-DOE module is reduced.
    Type: Application
    Filed: May 7, 2015
    Publication date: May 11, 2017
    Inventors: HONG-ZONG LIAO, YING-YUEH CHANG, CHIH-MING YEN
  • Patent number: 9443825
    Abstract: A surface-mount device (SMD) uses no conventional lead frame and contains a multi-function die module formed from either a single die or two or more dies electrically connected in series, in parallel, or in any combination of series and parallel, to provide such a SMD having one or more different functions including wave filtration, rectification, surge protection, sensing, current limiting, voltage regulation or prevention from voltage backflow, as compared to the prior art, the SMD disclosed is formed from fewer components, is simpler to manufacture and more effectively reduce layout wire length and noise.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: September 13, 2016
    Assignee: SFI ELECTRONICS TECHNOLOGY INC.
    Inventors: Ching-Hohn Lien, Xing-Xiang Huang, Hsing-Tsai Huang, Jie-An Zhu, Hong-Zong Xu, Yi-Wei Chen, Jung-Chun Chiang
  • Publication number: 20160240510
    Abstract: A surface-mount device (SMD) uses no conventional lead frame and contains a multi-function die module formed from either a single die or two or more dies electrically connected in series, in parallel, or in any combination of series and parallel, to provide such a SMD having one or more different functions including wave filtration, rectification, surge protection, sensing, current limiting, voltage regulation or prevention from voltage backflow, as compared to the prior art, the SMD disclosed is formed from fewer components, is simpler to manufacture and more effectively reduce layout wire length and noise.
    Type: Application
    Filed: February 9, 2016
    Publication date: August 18, 2016
    Inventors: Ching-Hohn LIEN, Xing-Xiang HUANG, Hsing-Tsai HUANG, Jie-An ZHU, Hong-Zong XU, Yi-Wei CHEN, Jung-Chun CHIANG
  • Publication number: 20160035697
    Abstract: A process for producing a miniaturized SMD diode package involves using a diode chip whose bottom surface has a positive electrode and a negative electrode, using a circuit board instead of a conventional lead frame during packaging, and using Charge-Coupled Device (CCD) image registration technology to perform chip bonding; the beneficial advantages brought from the process for producing the same including to simplify producing process and reduce manufacturing cost, to improve accuracy and precision of producing the miniaturized SMD diode package due to using a circuit board instead of conventionally used lead frame, and to ensure the produced miniaturized SMD diode package possesses excellent diode characteristics without distortion or defect.
    Type: Application
    Filed: October 13, 2015
    Publication date: February 4, 2016
    Inventors: Ching-Hohn LIEN, Xing- Xiang HUANG, Hsing-Tsai HUANG, Hong-Zong XU, Yi-Wei CHEN
  • Publication number: 20150323155
    Abstract: A structured light generation device includes a first surface structure and a second surface structure, which are opposed to each other. The first surface structure includes a diffractive optical element. The second surface structure includes a lenticular lens structure. By the diffractive optical element, an incident dot beam is processed into plural dot beams with different sizes and different brightness values. By the lenticular lens structure, the each dot beam is expanded to a linear beam. After the single dot beam is processed by the structured light generation device, a structured light is generated. The structured light generation device can be applied to a projection system with a 3D gesture sensing control or detection device.
    Type: Application
    Filed: May 7, 2015
    Publication date: November 12, 2015
    Inventors: HONG-ZONG LIAO, YING-YUEH CHANG
  • Publication number: 20150309042
    Abstract: The present invention relates to fluorogenic dendrimer reporters. In particular, the present invention relates to dendrimer nanoparticles conjugated with ‘click-on’ fluorogenic reporters and related methods of use.
    Type: Application
    Filed: January 6, 2014
    Publication date: October 29, 2015
    Inventors: James R. Baker, JR., Hong Zong, Sascha Goonewardena
  • Patent number: 9165872
    Abstract: A novel chip scale diode package due to no containing outer lead pins is miniaturized like a chip scale appearance to promote dimensional accuracy so that the diode package is so suitably produced by automation equipment to get automated mass production; the produced diode package may contain one or more diode chips to increase versatile functions more useful in applications, such as produced as a SMT diode package or an array-type SMT diode, and the present diode package due to made of no lead-containing material conforms to requirements for environmental protection.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: October 20, 2015
    Assignee: SFI ELECTRONICS TECHNOLOGY INC.
    Inventors: Ching-Hohn Lien, Xing-Xiang Huang, Hsing-Tsai Huang, Hong-Zong Xu
  • Publication number: 20150200147
    Abstract: A miniaturized SMD diode package involves using a diode chip whose bottom surface has a positive electrode and a negative electrode, using a circuit board instead of a conventional lead frame during packaging, and using Charge-Coupled Device (CCD) image registration technology to perform chip bonding; the beneficial advantages brought from a process for producing the same including to simplify producing process and reduce manufacturing cost, to improve accuracy and precision of producing the miniaturized SMD diode package due to using a circuit board instead of conventionally used lead frame, and to ensure the produced miniaturized SMD diode package possesses excellent diode characteristics without distortion or defect.
    Type: Application
    Filed: December 30, 2014
    Publication date: July 16, 2015
    Inventors: Ching-Hohn LIEN, Xing- Xiang HUANG, Hsing-Tsai HUANG, Hong-Zong XU, Yi-Wei CHEN