Patents by Inventor Hongfeng JIN

Hongfeng JIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136413
    Abstract: A laterally diffused metal oxide semiconductor device and a preparation method thereof are disclosed. The semiconductor device includes: a substrate; a body region having a first conductivity type and formed in the substrate; a drift region, having a second conductivity type, formed in the substrate and adjacent to the body region; a field plate structure, formed on the drift region, a lower surface of an end of the field plate structure close to the body region being flush with the upper surface of the substrate, and the end of the field plate structure close to the body region also having an upwardly extending inclined surface; and a drain region, having a second conductivity type, formed in an upper layer of the drift region, and in contact with the end of the field plate structure away from the body region.
    Type: Application
    Filed: July 27, 2021
    Publication date: April 25, 2024
    Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: CHUNXU LI, FENG LIN, SHUXIAN CHEN, HONGFENG JIN, HUAJUN JIN, GANG HUANG, YU HUANG, BIN YANG
  • Publication number: 20240047212
    Abstract: A semiconductor device and a manufacturing method therefor are disclosed. The method includes: providing a substrate of a first conductivity type; forming doped regions of a second conductivity type in the substrate, the doped regions including adjacent first and second drift regions, wherein the second conductivity type is opposite to the first conductivity type; forming a polysilicon film on the substrate, the polysilicon film covering the doped regions; forming patterned photoresist on the polysilicon film, which covers the first and second drift regions, and in which the polysilicon film above a reserved region for a body region between the first and second drift regions is exposed; and forming the body region of the first conductivity type in the reserved region by performing a high-energy ion implantation process, the body region having a top surface that is flush with top surfaces of the doped regions, the body region having a bottom surface that is not higher than bottom surfaces of the doped regions.
    Type: Application
    Filed: July 27, 2021
    Publication date: February 8, 2024
    Inventors: Hongfeng JIN, Ruibin CAO, Feng LIN, Xiang QIN, Yu HUANG, Chunxu LI
  • Publication number: 20230420496
    Abstract: The present disclosure provides a digital isolator structure and a method for forming the same. The method includes: providing a substrate; forming a first electrode plate on a surface of the substrate and forming a dielectric layer on the first electrode plate; etching the dielectric layer until the first electrode plate is exposed to form a deep trench in the dielectric layer; forming a connect layer on a bottom and a side surface of the deep trench and forming an insulating layer on at least a part of a surface of the connect layer; forming a lead-out electrode layer and a second electrode plate on a surface of the dielectric layer. The lead-out electrode layer is also disposed on a top surface of the connect layer. The method can reduce process steps and save cost of conductive materials.
    Type: Application
    Filed: April 4, 2023
    Publication date: December 28, 2023
    Inventors: Hongfeng JIN, Hongxu YANG, Hualun CHEN
  • Patent number: 11476324
    Abstract: An MIM capacitor and a manufacturing method therefor. The manufacturing method comprises: providing a semiconductor substrate, and forming a first metal layer on the semiconductor substrate; forming an anti-reflection layer on the first metal layer; performing photoetching and etching on the first metal layer and the anti-reflection layer so as to define an MIM capacitor region, wherein the first metal layer in the MIM capacitor region serves as a lower electrode plate of the MIM capacitor, and the anti-reflection layer in the MIM capacitor region serves as a dielectric layer of the MIM capacitor; and forming an upper electrode plate of the MIM capacitor on the anti-reflection layer in the MIM capacitor region.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: October 18, 2022
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventor: Hongfeng Jin
  • Patent number: 11158737
    Abstract: Provided in the present invention are an LDMOS component, a manufacturing method therefor, and an electronic device, comprising: a semiconductor substrate (100); a drift area (101) provided in the semiconductor substrate; a gate electrode structure (103) provided on a part of the surface of the semiconductor substrate and covers a part of the surface of the drift area; a source electrode (1052) and a drain electrode (1051) respectively provided in the semiconductor substrate on either side of the gate electrode structure, where the drain electrode is provided in the drift area and is separated from the gate electrode structure; a metal silicide barrier layer (106) covering the surface of at least a part of the semiconductor substrate between the gate electrode structure and the drain electrode; and a first contact hole (1081) provided on the surface of at least a part of the metal silicide barrier layer.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: October 26, 2021
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Huajun Jin, Guipeng Sun, Hongfeng Jin
  • Publication number: 20210296428
    Abstract: An MIM capacitor and a manufacturing method therefor. The manufacturing method comprises: providing a semiconductor substrate, and forming a first metal layer on the semiconductor substrate; forming an anti-reflection layer on the first metal layer; performing photoetching and etching on the first metal layer and the anti-reflection layer so as to define an MIM capacitor region, wherein the first metal layer in the MIM capacitor region serves as a lower electrode plate of the MIM capacitor, and the anti-reflection layer in the MIM capacitor region serves as a dielectric layer of the MIM capacitor; and forming an upper electrode plate of the MIM capacitor on the anti-reflection layer in the MIM capacitor region.
    Type: Application
    Filed: November 11, 2019
    Publication date: September 23, 2021
    Inventor: Hongfeng Jin
  • Publication number: 20200220010
    Abstract: Provided in the present invention are an LDMOS component, a manufacturing method therefor, and an electronic device, comprising: a semiconductor substrate (100); a drift area (101) provided in the semiconductor substrate; a gate electrode structure (103) provided on a part of the surface of the semiconductor substrate and covers a part of the surface of the drift area; a source electrode (1052) and a drain electrode (1051) respectively provided in the semiconductor substrate on either side of the gate electrode structure, where the drain electrode is provided in the drift area and is separated from the gate electrode structure; a metal silicide barrier layer (106) covering the surface of at least a part of the semiconductor substrate between the gate electrode structure and the drain electrode; and a first contact hole (1081) provided on the surface of at least a part of the metal silicide barrier layer.
    Type: Application
    Filed: August 3, 2018
    Publication date: July 9, 2020
    Inventors: Huajun JIN, Guipeng SUN, Hongfeng JIN