Patents by Inventor Hongjie Liu

Hongjie Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250131716
    Abstract: A rapid monitoring and identification method for winter wheat drought levels includes: 1) obtaining multispectral images and ground-measured LAI through UAV-based multi-payload low-altitude remote sensing technology, and calculating vegetation indices such as Normalized Difference Vegetation Index (NDVI), Difference Vegetation Index (DVI), Ratio Vegetation Index (RVI), Enhanced Vegetation Index (EVI), Optimized soil adjusted vegetation index (OSAVI) and Transformed Chlorophyll Absorption Reflectance Index; 2) establishing regression equations between the calculated vegetation indices and measured LAI for different growth stages, and selecting the optimal model equation for each growth stage; 3) using the optimal model equation to invert the LAI of winter wheat at various growth stages, and calibrating the LAI thresholds for different drought stress levels; 4) acquiring the multispectral images of target plot through real-time monitoring, calculating the required vegetation indices, inverting to obtain the LAI
    Type: Application
    Filed: December 25, 2024
    Publication date: April 24, 2025
    Inventors: Wenlong SONG, Hongjie LIU, Hanyu LIU, Yangjun SHI, Xuecheng XING, Yizhu LU, Jian LI, Lin LIN, Wenjing LU, Xiuhua CHEN, Rongjie GUI
  • Publication number: 20240400119
    Abstract: A method and system for virtually coupled train set (VCTS) control is provided. The method includes following steps: determining whether to execute a backup control strategy based on an actual state for a current cycle of each train unit and a target state sequence for a first preset number of cycles before the current cycle to obtain a first determination result; if the first determination result is yes, executing the backup control strategy to control each train unit; if the first determination result is no, calculating the target state sequence for the current cycle of each train unit according to a position or calculating the target state sequence for the current cycle of each train unit by using a synchronization relationship; and controlling each train unit according to the target state sequence for the current cycle of each train unit, respectively.
    Type: Application
    Filed: December 21, 2023
    Publication date: December 5, 2024
    Inventors: Hongjie LIU, Xiaolin LUO, Tao TANG, Ming CHAI, Shuai SU, Jidong LV
  • Publication number: 20240351616
    Abstract: This invention presents a function allocation system for an autonomous vehicle (AV). During the operations of the AV, some or all of its automated driving capabilities or functions could be downgraded due to long-tail events or malfunctioning. The roadside intelligent infrastructure, or the cloud platform, could supplement some or all of AV's automated driving functions, including sensing, prediction and decision-making, and/or control functions. The function allocation system dynamically allocates these functions between AV and intelligent infrastructure, achieving a higher system intelligence level S than the downgraded vehicle intelligence level V. In addition, a function allocation system could dynamically allocate sensing, prediction and decision-making, and/or control functions between AV and a cloud platform. This invention also presents a function integration system or a fusion system for an AV.
    Type: Application
    Filed: July 2, 2024
    Publication date: October 24, 2024
    Inventors: Bin Ran, Junwei You, Keshu Wu, Weizhe Tang, Yang Cheng, Yifan Yao, Tianyi Chen, Shuoxuan Dong, Mingheng Zhang, Xiaotian Li, Shen Li, Kunsong Shi, Haotian Shi, Yanghui Mo, Hongjie Liu, Ran Yi
  • Patent number: 12037023
    Abstract: The technology described herein provides Automated Driving System (ADS) methods and systems for coordinating and/or fusing intelligence and functions between Connected Automated Vehicles (CAV) and ADS infrastructure to provide target levels of automated driving. The technology provides systems and methods for function allocation comprising sensing allocation, prediction and decision-making allocation, and control allocation. The ADS operates across various intelligence levels, identified during vehicle operation. The function allocation system dynamically allocates essential functions based on the intelligence levels of both vehicles and infrastructures, ensuring that ADS achieves a system intelligence that surpasses that of individual components. This methodical function distribution enables ADS to manage both vehicles and infrastructures in a manner that enhances vehicular operations and control.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: July 16, 2024
    Assignee: CAVH LLC
    Inventors: Bin Ran, Tianyi Chen, Shuoxuan Dong, Yang Cheng, Mingheng Zhang, Xiaotian Li, Shen Li, Kunsong Shi, Haotian Shi, Yifan Yao, Yanghui Mo, Hongjie Liu, Keshu Wu, Ran Yi
  • Patent number: 11951529
    Abstract: Disclosed is a cartridge-type rivet feeding mechanism of a flow drill screwing device including a rivet box, a magazine for storing rivets from the rivet box, a rivet pulling mechanism including a rivet pulling block, a rivet pulling block guide housing and a linear driving unit connected with the rivet pulling block, a blowing mechanism including a curved connecting tube and a third air inlet, the rivet pulling block is defined with a T-shaped through hole capable of accommodating a rivet and configured for transferring the rivet from the first connecting tube to the second connecting tube. The first air inlet and the second air inlet are both configured for introducing compressed air to push the rivet to move towards the riveter head.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: April 9, 2024
    Assignee: JEE TECHNOLOGY CO., LTD.
    Inventors: Lei Liu, Zhe Weng, Donghua Tang, Hongjie Liu
  • Publication number: 20240111987
    Abstract: A current integration-based in-memory spiking neural network (SNN) uses charge-domain computation which is naturally compatible with working mechanisms of neurons. In one aspect, silicon-based SRAM cells are included in memory cells of a synaptic array, which can avoid non-idealities caused by resistive NVM materials. Additionally, a modified NVM cell is provided, which benefits from the in-memory SNN architecture design. When SRAM cells are used as memory cells in the synaptic array, post-neuron circuits are designed accordingly so that the in-memory SNN architecture can be used in computation with multi-bit synaptic weights by combining a programmable number of columns. Further, for computation with multi-bit synaptic weights, a circuit is designed to be time-multiplexed for resource sharing to achieve improved area and energy efficiency.
    Type: Application
    Filed: March 17, 2021
    Publication date: April 4, 2024
    Inventors: Minhao Yang, Hongjie Liu
  • Patent number: 11948659
    Abstract: A mixed-signal in-memory computing sub-cell only requires 9 transistors for 1-bit multiplication. A computing cell is constructed from a plurality of such sub-cells that share a common computing capacitor and a common transistor. A MAC array for performing MAC operations, includes a plurality of the computing cells each activating the sub-cells therein in a time-multiplexed manner. A differential version of the MAC array provides improved computation error tolerance and an in-memory mixed-signal computing module for digitalizing parallel analog outputs of the MAC array and for performing other tasks in the digital domain. An ADC block in the computing module makes full use of capacitors in the MAC array, allowing the computing module to have a reduced area and suffer from fewer computational errors.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: April 2, 2024
    Assignee: Reexen Technology Co., Ltd.
    Inventors: Minhao Yang, Hongjie Liu, Alonso Morgado, Neil Webb
  • Patent number: 11894820
    Abstract: In one aspect, a time division interleaving band-pass filter can be used in voice activity detection, which operates at different central frequencies in respective intervals of a predetermined period of time. The band-pass filter circuitry includes multiple band-pass filtering channels sharing a common transistor circuit, bias circuit and current mirror circuit. The multiple band-pass filtering channels operate in a time division interleaving manner, which enables the sharing of the common set of band-pass filter circuitry components. Thus, the present invention allows a reduced chip area as the area does not increase proportionally with the number of filtering channels. The invention also mitigates the influence of transistor fabrication variations on the filter's central frequencies.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: February 6, 2024
    Assignee: Reexen Technology Co., Ltd.
    Inventors: Xiaofeng Yang, Minhao Yang, Hongjie Liu
  • Publication number: 20240020959
    Abstract: A method and system for generating test cases for visual train positioning are provided and relate to the technical field of train positioning. The method includes: first obtaining real environment images around a train, and classifying the real environment images based on blur types; training a generative adversarial network (GAN)-based image generation network with each non-blurred training image, each blurred training image of any blur type in a same scenario and a preset blur type as inputs, and a reconstructed blurred image and a corresponding blur type as outputs, to obtain an image generation model; then inputting each real non-blurred image and target reference data into the image generation model to generate a target reconstructed blurred image, and then deleting target reconstructed blurred images with structural similarities lower than a set threshold.
    Type: Application
    Filed: April 3, 2023
    Publication date: January 18, 2024
    Inventors: Ming CHAI, Dong XIE, Hongjie LIU, Shuai SU, Jidong LV
  • Publication number: 20230311959
    Abstract: A method for trains to establish a virtual coupling (VC) operation mode, which includes: successively determining whether adjacent preceding and following trains on a same line meet initial conditions and formation conditions of the VC; and performing VC on both trains meeting the initial conditions and formation conditions, and determining the VC of all trains on the line through the above determination method to obtain an overall VC. The method further including controlling operation of a leading train in the overall VC according to driving permission of the VC, and controlling operation of each of remaining following trains based on communication with the corresponding adjacent preceding train in combination with the following train's own driving information. An establishment process of forming a VC operation mode, thereby improving efficiency of train transportation and flexibility of organization and scheduling.
    Type: Application
    Filed: September 6, 2022
    Publication date: October 5, 2023
    Applicant: BEIJING JIAOTONG UNIVERSITY
    Inventors: Ming Chai, Qi Wang, Hongjie Liu, Jidong Lv, Shuai Su
  • Publication number: 20230089754
    Abstract: A method for implementing a neural network accelerator using only on-chip memory is provided. The method includes: according to a current neural network model, determining a layer having a minimum value of an output feature map in a neural network (101); determining a quantity of layers of pipeline computing (102); determining a quantity of PEs used for pipeline computing (103); applying for a PE and storing an output feature map of the last layer of pipeline computing in on-chip memory (104), releasing a PE corresponding to a layer at which pipeline computing is completed (105), and repeating the above process at a layer at which computing is to be performed until pipeline computing is completed at all layers of the entire neural network. A neural network accelerator using only on-chip memory is further provided, including a controller, a loading module, a computing array, a post processing module, a storage module, and an on-chip buffer.
    Type: Application
    Filed: March 4, 2021
    Publication date: March 23, 2023
    Applicant: REEXEN TECHNOLOGY CO., LTD.
    Inventors: Qiaoqiao Chen, Hongjie Liu
  • Publication number: 20230019343
    Abstract: Disclosed in the present invention is An annotation method of arbitrary-oriented rectangular bounding box, wherein: the elements for annotation being: the coordinates of the center point C, a vector {right arrow over (CD)} formed by the center point C and a chosen vertex D, and the ratio of the vector {right arrow over (CP)} to vector {right arrow over (CD)}, where {right arrow over (CP)} is the projection of the vector {right arrow over (CE)} to {right arrow over (CD)}, and {right arrow over (CE)} is a vector formed by the center of the bounding box to one of the vertex E that close neighbor to vertex D; and it is also required that the vector {right arrow over (CP)} is in the same direction as the vector {right arrow over (CD)}, the vertex E in either of the clockwise or counterclockwise direction of the vertex D.
    Type: Application
    Filed: September 13, 2022
    Publication date: January 19, 2023
    Inventors: Wenlong Song, Juan LV, Changjun LIU, Rui TANG, Tao SUN, Xiaotao LI, June FU, He ZHU, Yizhu LU, Long CHEN, Hongjie LIU
  • Publication number: 20220351761
    Abstract: A mixed-signal in-memory computing sub-cell only requires 9 transistors for 1-bit multiplication. A computing cell is constructed from a plurality of such sub-cells that share a common computing capacitor and a common transistor. Also proposed is a MAC array for performing MAC operations, which includes a plurality of the computing cells each activating the sub-cells therein in a time-multiplexed manner. Also proposed is a differential version of the MAC array with improved computation error tolerance and an in-memory mixed-signal computing module for digitalizing parallel analog outputs of the MAC array and for performing other tasks in the digital domain. An ADC block in the computing module makes full use of capacitors in the MAC array, thus allowing the computing module to have a reduced area and suffer from less computation errors. Also proposed is a method of fully taking advantage of data sparsity to lower the ADC block's power consumption.
    Type: Application
    Filed: March 30, 2021
    Publication date: November 3, 2022
    Inventors: Minhao Yang, Hongjie Liu, Alonso Morgado, Neil Webb
  • Publication number: 20220294424
    Abstract: In one aspect, a time division interleaving band-pass filter can be used in voice activity detection, which operates at different central frequencies in respective intervals of a predetermined period of time. The band-pass filter circuitry includes multiple band-pass filtering channels sharing a common transistor circuit, bias circuit and current mirror circuit. The multiple band-pass filtering channels operate in a time division interleaving manner, which enables the sharing of the common set of band-pass filter circuitry components. Thus, the present invention allows a reduced chip area as the area does not increase proportionally with the number of filtering channels. The invention also mitigates the influence of transistor fabrication variations on the filter's central frequencies.
    Type: Application
    Filed: March 4, 2021
    Publication date: September 15, 2022
    Inventors: Xiaofeng Yang, Minhao Yang, Hongjie Liu
  • Publication number: 20220276835
    Abstract: A mixed-signal in-memory computing sub-cell requires only 9 transistors for 1-bit multiplication. In one aspect, there is a computing cell is constructed from a plurality of such sub-cells that share a common computing capacitor and common transistors. As a result, the average number of transistors in each sub-cell is close to 6. Also proposed is a MAC array for performing MAC operations, which includes a plurality of the computing cells each activating the sub-cells therein in a time-multiplexed manner. Also proposed is a differential version of the MAC array with improved computation error tolerance. Also proposed is an in-memory mixed-signal computing module for digitalizing parallel analog outputs of the MAC array and for performing other tasks in the digital domain. An ADC block in the computing module makes full use of capacitors in the MAC array, thus allowing the computing module to have a reduced area and suffer from less computation errors.
    Type: Application
    Filed: March 30, 2021
    Publication date: September 1, 2022
    Inventors: Minhao Yang, Hongjie Liu, Alonso Morgado, Neil Webb
  • Publication number: 20220212245
    Abstract: Disclosed is a method for automatically determining quality of a self-piercing riveting process, including the following operations: inputting standard values, acquiring data in real-time, and comparing data and determining quality of riveting. Riveting parameters and process curves are obtained in real time by a data acquisition system, the measured values for determining quality of riveting is calculated according to the real-time change of the riveting force curve and information of the riveted plates, the quality of the riveting process can be automatically determined by comparing the measured values and the standard values, the efficiency of monitoring quality is improved, inspection of all riveting points can be realized, abandonment of white vehicle bodies due to poor riveting quality is greatly reduced, and the problem that a large number of white vehicle bodies with defective quality cannot be found is avoided, and the riveting quality of the white vehicle bodies is guaranteed.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 7, 2022
    Applicant: JEE TECHNOLOGY CO., LTD.
    Inventors: Lei LIU, Duan LIANG, Hongjie LIU, Donghua TANG
  • Publication number: 20220176439
    Abstract: Disclosed is a cartridge-type rivet feeding mechanism of a flow drill screwing device including a rivet box, a magazine for storing rivets from the rivet box, a rivet pulling mechanism including a rivet pulling block, a rivet pulling block guide housing and a linear driving unit connected with the rivet pulling block, a blowing mechanism including a curved connecting tube and a third air inlet, the rivet pulling block is defined with a T-shaped through hole capable of accommodating a rivet and configured for transferring the rivet from the first connecting tube to the second connecting tube. The first air inlet and the second air inlet are both configured for introducing compressed air to push the rivet to move towards the riveter head.
    Type: Application
    Filed: February 23, 2022
    Publication date: June 9, 2022
    Applicant: JEE TECHNOLOGY CO., LTD.
    Inventors: Lei LIU, Zhe WENG, Donghua TANG, Hongjie LIU
  • Publication number: 20210394797
    Abstract: Provided herein is technology relating to automated driving and particularly, but not exclusively, to systems comprising roadside intelligent units (RIU) and infrastructure of specific intelligence levels and related methods for providing and/or supplementing automated driving capabilities of connected and automated vehicles (CAV).
    Type: Application
    Filed: May 24, 2021
    Publication date: December 23, 2021
    Inventors: Bin Ran, Tianyi Chen, Shuoxuan Dong, Yang Cheng, Mingheng Zhang, Xiaotian Li, Shen Li, Kunsong Shi, Haotian Shi, Yifan Yao, Yanghui Mo, Hongjie Liu, Keshu Wu, Ran Yi
  • Patent number: 11037299
    Abstract: A Region Merging image segmentation algorithm based on boundary extraction is disclosed, comprising the steps of calculating a gradient image, extracting a boundary and carrying out initial segmentation and Region Merging, wherein each pixel is regarded as one region when initial segmentation is not conducted. In the Region Merging process, the portion of the common boundary of two adjacent regions that lies on the boundary image is taken as the merging cost, the regions are merged according to the ascending order of the mean gradient value inside the region, and a texture difference evaluation mechanism is introduced to reduce the wrong segmentation. The algorithm solves the problems of the other current segmentation algorithms, such as over-segmentation, easy to be influenced by noise and illumination, large in computation and memory consumption, in need of a large number of samples being marked manually and the like.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: June 15, 2021
    Assignee: CHINA INSTITUTE OF WATER RESOURCES AND HYDROPOWER RESEARCH
    Inventors: Wenlong Song, Rui Tang, Juan Lv, Jingxuan Lu, Kun Yang, Zhicheng Su, Yuanyuan Duan, Xuejun Zhang, Lihua Zhao, Yizhu Lu, Hongjie Liu
  • Publication number: 20210123891
    Abstract: A solvent delivery subsystem for a chromatography device performs relatively low pressure, high flow mixing of solvents to form a gradient and subsequent high pressure, low flow delivery of the gradient to the separation column. The mixing of the gradient is independent and does not interfere with the gradient delivery. To form the gradient, the outputs of an aqueous pump and an organic pump are mixed to fill a storage capillary while a downstream point from the storage capillary is vented to atmosphere. After gradient formation, the vent to atmosphere is closed, the solvent delivery system rises to high pressure, and only the aqueous pump runs for gradient delivery. To maintain integrity of the fluid stream, the solvent delivery system uses feed forward compensation and controls at least one parameter selected from the group consisting of pressure and flow in the conduit means to follow a gradual ramp.
    Type: Application
    Filed: January 7, 2021
    Publication date: April 29, 2021
    Applicant: Waters Technologies Corporation
    Inventors: Steven J. Ciavarini, Stanley P. Pensak, JR., Jeffrey W. Finch, Keith Fadgen, Hongji Liu