Patents by Inventor Hongju KAL

Hongju KAL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12287984
    Abstract: A data processing system and method for accessing a heterogeneous memory system including a processing unit are provided. The heterogeneous memory system includes a memory module and high bandwidth memory (HBM) including a processing-in-memory (PIM) circuit combined with a memory controller. The memory controller is configured to detect a data array required for an arithmetic operation from a memory module or the HBM by using a border index value when the arithmetic operation is performed by the PIM circuit of the HBM and generate a memory module command set and an HBM command set using physical address spaces respectively designated in the memory module and the HBM.
    Type: Grant
    Filed: December 6, 2023
    Date of Patent: April 29, 2025
    Assignees: SAMSUNG ELECTRONICS CO., LTD., INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Wonseb Jeong, Hongju Kal, Won Woo Ro, Seokmin Lee, Gun Ko
  • Patent number: 12282517
    Abstract: Disclosed is a memory system using a heterogeneous data format, which provides a personalized recommendation algorithm function to an internet service user based on a plurality of items, which includes a user preference analyzer for each item that calculates a user preference value corresponding to each item of a analysis target service; and a memory that stores data related to the each item in a first data format or stores data related to the each item in a second data format with required bits less than the first data format, based on the user preference value of the each item.
    Type: Grant
    Filed: December 26, 2022
    Date of Patent: April 22, 2025
    Assignee: UIF (University Industry Foundation), Yonsei University
    Inventors: Won Woo Ro, Chanyoung Yoo, Hongju Kal
  • Publication number: 20240202136
    Abstract: A memory management unit includes a TLB configured to cache PTEs including a mapping between a virtual and a physical frame number, and to convert a virtual address into a physical address using the cached PTEs. A page table walk request queue is configured to queue page requests corresponding to a virtual page number when a TLB miss is occurred, and one or more PTWs are configured to acquire a PTE from the main memory, and to convert the virtual page numbers into physical frame numbers using the PTE. A PTW is configured to select associated page table walk requests having the same base address of corresponding virtual page numbers, to consecutively provide cache line requests for acquiring PTEs corresponding to the associated page table walk requests, to acquire the PTEs corresponding to the associated PTE requests, and to provide the acquired PTEs to the TLB.
    Type: Application
    Filed: November 5, 2023
    Publication date: June 20, 2024
    Applicant: UIF (University Industry Foundation) , Yonsei University
    Inventors: Jiwon Lee, Won Woo Ro, Ipoom Jeong, Hongju Kal, Gun Ko, Hyunwuk Lee
  • Publication number: 20240103755
    Abstract: A data processing system and method for accessing a heterogeneous memory system including a processing unit are provided. The heterogeneous memory system includes a memory module and high bandwidth memory (HBM) including a processing-in-memory (PIM) circuit combined with a memory controller. The memory controller is configured to detect a data array required for an arithmetic operation from a memory module or the HBM by using a border index value when the arithmetic operation is performed by the PIM circuit of the HBM and generate a memory module command set and an HBM command set using physical address spaces respectively designated in the memory module and the HBM.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Applicants: SAMSUNG ELECTRONICS CO., LTD., INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Wonseb JEONG, Hongju KAL, Won Woo RO, Seokmin LEE, Gun KO
  • Patent number: 11880590
    Abstract: A data processing system and method for accessing a heterogeneous memory system including a processing unit are provided. The heterogeneous memory system includes a memory module and high bandwidth memory (HBM) including a processing-in-memory (PIM) circuit combined with a memory controller. The memory controller is configured to detect a data array required for an arithmetic operation from a memory module or the HBM by using a border index value when the arithmetic operation is performed by the PIM circuit of the HBM and generate a memory module command set and an HBM command set using physical address spaces respectively designated in the memory module and the HBM.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: January 23, 2024
    Assignees: SAMSUNG ELECTRONICS CO., LTD., INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Wonseb Jeong, Hongju Kal, Won Woo Ro, Seokmin Lee, Gun Ko
  • Publication number: 20230259564
    Abstract: Disclosed is a memory system using a heterogeneous data format, which provides a personalized recommendation algorithm function to an internet service user based on a plurality of items, which includes a user preference analyzer for each item that calculates a user preference value corresponding to each item of a analysis target service; and a memory that stores data related to the each item in a first data format or stores data related to the each item in a second data format with required bits less than the first data format, based on the user preference value of the each item.
    Type: Application
    Filed: December 26, 2022
    Publication date: August 17, 2023
    Applicant: UIF (University Industry Foundation), Yonsei University
    Inventors: Won Woo Ro, Chanyoung Yoo, Hongju Kal
  • Publication number: 20220398032
    Abstract: A data processing system and method for accessing a heterogeneous memory system including a processing unit are provided. The heterogeneous memory system includes a memory module and high bandwidth memory (HBM) including a processing-in-memory (PIM) circuit combined with a memory controller. The memory controller is configured to detect a data array required for an arithmetic operation from a memory module or the HBM by using a border index value when the arithmetic operation is performed by the PIM circuit of the HBM and generate a memory module command set and an HBM command set using physical address spaces respectively designated in the memory module and the HBM.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 15, 2022
    Applicants: SAMSUNG ELECTRONICS CO., LTD., INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Wonseb JEONG, Hongju KAL, Won Woo RO, Seokmin LEE, Gun KO