Patents by Inventor Hongliang Cai

Hongliang Cai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984599
    Abstract: An electrode component for an electrochemical cell is provided herein. The electrode component includes a current collector having a first surface, a metal oxide layer disposed on the first surface of the current collector, and a lithium-containing layer bonded to the first surface of the current collector. The metal oxide layer includes a plurality of features. A method for manufacturing such an electrode component is also provided herein. The method includes directing a laser beam toward the first surface of the current collector in the presence of oxygen to form the metal oxide layer on the first surface and applying the lithium-containing layer to the metal oxide layer thereby bonding the lithium-containing layer with the current collector.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: May 14, 2024
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Fang Dai, Hongliang Wang, Shuru Chen, Qinglin Zhang, Mei Cai
  • Publication number: 20240079604
    Abstract: A multifunctional mixed oxide electrocatalyst material including a metal oxide A with oxygen storage capacity and a metal oxide B with oxygen evolution reaction is prepared by two-steps hydrothermal reactions. The electrocatalyst material is a good free radical scavenger, oxygen evolution reagent and able to alleviate carbon monoxide poisoning on catalyst, when it is applied in a membrane electrode assembly for fuel cells.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Hongliang AO, Yunsong YANG, Yun CAI, Siyu YE, Yuquan ZOU, Junke TANG, Ning SUN
  • Patent number: 10672730
    Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: June 2, 2020
    Assignee: Futurewei Technologies, Inc.
    Inventors: Shiqun Gu, Hongying Zhang, HongLiang Cai
  • Publication number: 20190273060
    Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.
    Type: Application
    Filed: May 16, 2019
    Publication date: September 5, 2019
    Applicant: FUTUREWEI TECHNOLOGIES, INC.
    Inventors: Shiqun Gu, Hongying Zhang, HongLiang Cai
  • Patent number: 10304792
    Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: May 28, 2019
    Assignee: Futurewei Technologies, Inc.
    Inventors: Shiqun Gu, Hongying Zhang, HongLiang Cai
  • Publication number: 20190148323
    Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.
    Type: Application
    Filed: November 16, 2017
    Publication date: May 16, 2019
    Applicant: Futurewei Technologies, Inc.
    Inventors: Shiqun Gu, Hongying Zhang, HongLiang Cai
  • Publication number: 20140057066
    Abstract: Building boards and method for manufacturing the same are provided. The building board comprises a cement layer (102) and a magnesium oxide layer (104). The method for manufacturing the building board comprises the steps of providing a cement board and a magnesium oxide board, dehydrating and binding the cement board and the magnesium oxide board. The performance of moisture proofing, fungus proofing, erode proofing, fireproof and others can be improved by utilizing the building boards.
    Type: Application
    Filed: April 12, 2012
    Publication date: February 27, 2014
    Applicant: NEWSPIRIT CHINA LTD.
    Inventor: Hongliang Cai