Patents by Inventor Hongxi Xiao
Hongxi Xiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11094738Abstract: The embodiments of the present disclosure provide a photoelectric detector, a method for manufacturing the photoelectric detector, and a detection device. The method for manufacturing the photoelectric detector includes: forming a thin film transistor array layer on a base substrate; forming an organic layer on a side of the thin film transistor array layer facing away from the base substrate; and patterning the organic layer to form a first via hole which enables a signal transmission layer in the thin film transistor array layer to be exposed; and depositing a photoelectric conversion device in the first via hole.Type: GrantFiled: July 10, 2019Date of Patent: August 17, 2021Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Haisheng Zhao, Hongxi Xiao, Jiapeng Li, Huigang Jiang, Xiaoguang Pei
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Patent number: 10627685Abstract: An array substrate, a method for fabricating the same, a display panel and a display device are disclosed. The array substrate comprises leading wires, the plurality of leading wires form a plurality of grooves in a fanout area of the array substrate, the plurality of grooves are filled with a filler, and the filler filled in the grooves has an upper surface which is flush with leading wires surrounding the grooves. The filler is made from an insulating and transparent material.Type: GrantFiled: April 25, 2017Date of Patent: April 21, 2020Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Chong Liu, Haisheng Zhao, Xiaoguang Pei, Zhilian Xiao, Zhilong Peng, Hongxi Xiao, Wei Wang
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Publication number: 20200052031Abstract: The embodiments of the present disclosure provide a photoelectric detector, a method for manufacturing the photoelectric detector, and a detection device. The method for manufacturing the photoelectric detector includes: forming a thin film transistor array layer on a base substrate; forming an organic layer on a side of the thin film transistor array layer facing away from the base substrate; and patterning the organic layer to form a first via hole which enables a signal transmission layer in the thin film transistor array layer to be exposed; and depositing a photoelectric conversion device in the first via hole.Type: ApplicationFiled: July 10, 2019Publication date: February 13, 2020Applicants: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Haisheng ZHAO, Hongxi XIAO, Jiapeng LI, Huigang JIANG, Xiaoguang PEI
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Patent number: 10545594Abstract: An array substrate includes a substrate, a first signal line and a second signal line on the substrate, an insulating layer covering the first signal line and the second signal line, and a groove penetrating through the insulating layer. The first signal line and the second signal line are arranged in a same layer and separated from each other. The groove is between the first signal line and the second signal line.Type: GrantFiled: August 15, 2017Date of Patent: January 28, 2020Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Chong Liu, Haisheng Zhao, Zhilian Xiao, Hongxi Xiao, Wei Wang, Xiaoguang Pei
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Patent number: 10312270Abstract: A method of manufacturing an array substrate assembly and an array substrate assembly manufactured by the method are disclosed. The method includes: manufacturing a gate metal layer on a substrate, the gate metal layer including a gate line and a common electrode signal line spaced from each other; forming a gate insulating layer, an active layer, a source-drain electrode layer, a passivation layer, and a protective pattern on the gate metal layer; and forming, in the passivation layer and the gate insulating layer, a via hole configured for a connection to the common electrode signal line. An orthogonal projection of the protective pattern on the substrate and an orthogonal projection of the via hole on the substrate partly coincide with each other, and the orthogonal projection of the protective pattern on the substrate and an orthogonal projection of the gate line on the substrate partly coincide with each other.Type: GrantFiled: September 19, 2017Date of Patent: June 4, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zhilian Xiao, Haisheng Zhao, Hongxi Xiao, Xiaoguang Pei, Chong Liu
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Publication number: 20190123067Abstract: A method of manufacturing an array substrate assembly and an array substrate assembly manufactured by the method are disclosed. The method includes: manufacturing a gate metal layer on a substrate, the gate metal layer including a gate line and a common electrode signal line spaced from each other; forming a gate insulating layer, an active layer, a source-drain electrode layer, a passivation layer, and a protective pattern on the gate metal layer; and forming, in the passivation layer and the gate insulating layer, a via hole configured for a connection to the common electrode signal line. An orthogonal projection of the protective pattern on the substrate and an orthogonal projection of the via hole on the substrate partly coincide with each other, and the orthogonal projection of the protective pattern on the substrate and an orthogonal projection of the gate line on the substrate partly coincide with each other.Type: ApplicationFiled: September 19, 2017Publication date: April 25, 2019Inventors: Zhilian Xiao, Haisheng Zhao, Hongxi Xiao, Xiaoguang Pei, Chong Liu
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Publication number: 20190012023Abstract: An array substrate includes a substrate, a first signal line and a second signal line on the substrate, an insulating layer covering the first signal line and the second signal line, and a groove penetrating through the insulating layer. The first signal line and the second signal line are arranged in a same layer and separated from each other. The groove is between the first signal line and the second signal line.Type: ApplicationFiled: August 15, 2017Publication date: January 10, 2019Applicants: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Chong Liu, Haisheng Zhao, Zhilian Xiao, Hongxi Xiao, Wei Wang, Xiaoguang Pei
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Publication number: 20180188573Abstract: An array substrate, a method for fabricating the same, a display panel and a display device are disclosed. The array substrate comprises leading wires, the plurality of leading wires form a plurality of grooves in a fanout area of the array substrate, the plurality of grooves are filled with a filler, and the filler filled in the grooves has an upper surface which is flush with leading wires surrounding the grooves. The filler is made from an insulating and transparent material.Type: ApplicationFiled: April 25, 2017Publication date: July 5, 2018Inventors: Chong LIU, Haisheng ZHAO, Xiaoguang PEI, Zhilian XIAO, Zhilong PENG, Hongxi XIAO, Wei WANG
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Publication number: 20170294465Abstract: A film patterning method is provided. The method comprises: performing a dry etching process on a film to be patterned, so as to form a patterned film; removing a suspended particle on the patterned film; and performing another dry etching process on the patterned film after the suspended particle is removed, to form a final pattern of the film. By moving or completely removing the suspended particle on the patterned film and then performing another dry etching process on the patterned film to etch away the etching residue, existence of the etching residue is completely avoided in the final pattern of the film, so that the product yield is improved and the product quality is ensured.Type: ApplicationFiled: July 28, 2016Publication date: October 12, 2017Applicants: BOE Technology Group Co., Ltd., Beijing BOE Optoelectronics Technology Co., Ltd.Inventors: Xiaoguang Pei, Haisheng Zhao, Zhilong Peng, Hongxi Xiao, Chong Liu, Zhilian Xiao, Zijin Lin, Yunfei Bai, Huigang Jiang, Yiping Dong, Hao Chen, Miao Qiu, Kuo Chang
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Patent number: 9711539Abstract: The present invention provides an array substrate, a method of fabricating the array substrate, and a display device. The method of fabricating the array substrate of the present invention comprises steps of: sequentially forming a first transparent conductive film and a source-drain metal film on a substrate; forming a source-drain metal pattern by performing a patterning process on the source-drain metal film; forming a pattern comprising a pixel electrode and a compensation structure that is provided below the source-drain metal pattern by performing a patterning process on the first transparent conductive film.Type: GrantFiled: July 17, 2015Date of Patent: July 18, 2017Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Chong Liu, Haisheng Zhao, Haitao Ma, Hongxi Xiao, Zhilong Peng, Huanping Liu
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Publication number: 20160126261Abstract: The present invention provides an array substrate, a method of fabricating the array substrate, and a display device. The method of fabricating the array substrate of the present invention comprises steps of: sequentially forming a first transparent conductive film and a source-drain metal film on a substrate; forming a source-drain metal pattern by performing a patterning process on the source-drain metal film; forming a pattern comprising a pixel electrode and a compensation structure that is provided below the source-drain metal pattern by performing a patterning process on the first transparent conductive film.Type: ApplicationFiled: July 17, 2015Publication date: May 5, 2016Inventors: Chong LIU, Haisheng ZHAO, Haitao MA, Hongxi XIAO, Zhilong PENG, Huanping LIU
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Publication number: 20150044424Abstract: A bottom electrode and a method of manufacturing the same are disclosed. The present invention relates to the field of dry etching, and has solved problems of separately fabrication of the ceramic points and ceramic layer of the conventional bottom electrode, low adhesion strength between the ceramic points and ceramic layer, incidental dropping off the ceramic layer. The bottom electrode includes: a metal substrate and an insulating layer disposed on the metal substrate, wherein the metal substrate comprises: a base substrate and a plurality of protrusion parts disposed on the base substrate, the insulating layer is disposed on surface of the base substrate and the protrusion parts on surface of the base substrate. Insulating protrusion points are formed at the protrusion parts.Type: ApplicationFiled: April 24, 2013Publication date: February 12, 2015Inventors: Xiaowei Jiang, Hongxi Xiao, Huafeng Liu, Hao Chen, Xiaohui Zhu
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Patent number: 8735976Abstract: A Thin Film Transistor-Liquid Crystal Display (TFT-LCD) array substrate is presented which includes a gate line, a data line, and a pixel electrode. The pixel electrode is disposed in a pixel region defined by the intersection between the gate line and the data line. In the pixel region, a partition groove for forming a pixel electrode pattern is provided at the periphery of the pixel electrode.Type: GrantFiled: February 26, 2013Date of Patent: May 27, 2014Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Hongxi Xiao, Jae Yun Jung, Zuhong Liu, Taek Ho Hong, Jeong Hun Rhee
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Patent number: 8633065Abstract: The present invention relates to a method for manufacturing a mother substrate, the mother substrate comprising: a substrate comprising at least one display region and pre-cutting regions in a periphery of the display region, wherein the display region comprises gate scanning lines and data scanning lines, the pre-cutting regions comprise a gate-line connecting line and a data-line connecting line electrically connected to each other, and the gate-line connecting line is electrically connected to all of the gate scanning lines in the display region, and the data-line connecting line is electrically connected to all of the data scanning lines in the display region substrate.Type: GrantFiled: June 4, 2013Date of Patent: January 21, 2014Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Huafeng Liu, Hongxi Xiao, Shunkang Su, Ping Wu, Hanting Ding
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Publication number: 20130267053Abstract: The present invention relates to a method for manufacturing a mother substrate, the mother substrate comprising: a substrate comprising at least one display region and pre-cutting regions in a periphery of the display region, wherein the display region comprises gate scanning lines and data scanning lines, the pre-cutting regions comprise a gate-line connecting line and a data-line connecting line electrically connected to each other, and the gate-line connecting line is electrically connected to all of the gate scanning lines in the display region, and the data-line connecting line is electrically connected to all of the data scanning lines in the display region substrate.Type: ApplicationFiled: June 4, 2013Publication date: October 10, 2013Inventors: Huafeng LIU, Hongxi XIAO, Shunkang SU, Ping WU, Hanting DING
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Patent number: 8482006Abstract: The present invention relates to a mother substrate and a method for manufacturing the same, the mother substrate comprising: a substrate, comprising at least one display region and pre-cutting regions in a periphery of the display region, wherein the display region comprises gate scanning lines and data scanning lines, the pre-cutting regions comprise a gate-line connecting line and a data-line connecting line electrically connected to each other, and the gate-line connecting line is electrically connected to all of the gate scanning lines in the display region, and the data-line connecting line is electrically connected to all of the data scanning lines in the display region substrate.Type: GrantFiled: June 15, 2011Date of Patent: July 9, 2013Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Huafeng Liu, Hongxi Xiao, Shunkang Su, Ping Wu, Hanting Ding
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Patent number: 8431452Abstract: A liquid crystal display (LCD) array substrate and a manufacturing method thereof are provided. The manufacturing method comprises depositing a semiconductor layer, a doped semiconductor layer and a metal film for source and drain electrodes sequentially on a base substrate and then forming a data line, a source electrode, a drain electrode and a thin film transistor (TFT) channel region by a first patterning process; depositing a first insulating film and a gate metal film sequentially and then forming a gate line and a gate electrode by a second patterning process and forming an insulating layer via hole in the first insulating layer above the drain electrode; depositing a transparent conductive film and then forming a pixel electrode by a third patterning process; and forming a second insulating layer.Type: GrantFiled: December 28, 2011Date of Patent: April 30, 2013Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Zhi Hou, Jae Yun Jung, Yunyou Zheng, Hongxi Xiao, Wei Li
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Patent number: 8404507Abstract: A TFT-LCD array substrate and a manufacturing method thereof. The array substrate comprises a gate line, a data line, and a pixel electrode, and the pixel electrode is disposed in a pixel region defined by the intersection between the gate line and the data line. In the pixel region, a partition groove for forming a pixel electrode pattern is provided at the periphery of the pixel electrode. This structure is helpful to form a pixel electrode pattern by a lift-off process, which significantly reduces the production cost and improves the production yield.Type: GrantFiled: June 24, 2009Date of Patent: March 26, 2013Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Hongxi Xiao, Jae Yun Jung, Zuhong Liu, Taek Ho Hong, Jeong Hun Rhee
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Publication number: 20120094409Abstract: A liquid crystal display (LCD) array substrate and a manufacturing method thereof are provided. The manufacturing method comprises depositing a semiconductor layer, a doped semiconductor layer and a metal film for source and drain electrodes sequentially on a base substrate and then forming a data line, a source electrode, a drain electrode and a thin film transistor (TFT) channel region by a first patterning process; depositing a first insulating film and a gate metal film sequentially and then forming a gate line and a gate electrode by a second patterning process and forming an insulating layer via hole in the first insulating layer above the drain electrode; depositing a transparent conductive film and then forming a pixel electrode by a third patterning process; and forming a second insulating layer.Type: ApplicationFiled: December 28, 2011Publication date: April 19, 2012Applicant: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Hou Zhi, Jae Yun JUNG, Yunyou ZHENG, Hongxi XIAO, Wei LI
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Publication number: 20110309380Abstract: The present invention relates to a mother substrate and a method for manufacturing the same, the mother substrate comprising: a substrate, comprising at least one display region and pre-cutting regions in a periphery of the display region, wherein the display region comprises gate scanning lines and data scanning lines, the pre-cutting regions comprise a gate-line connecting line and a data-line connecting line electrically connected to each other, and the gate-line connecting line is electrically connected to all of the gate scanning lines in the display region, and the data-line connecting line is electrically connected to all of the data scanning lines in the display region substrate.Type: ApplicationFiled: June 15, 2011Publication date: December 22, 2011Applicant: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Huafeng LIU, Hongxi XIAO, Shunkang SU, Ping WU, Hanting DING