Patents by Inventor Hongxin Yang

Hongxin Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200185455
    Abstract: The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element and a two-terminal selector element coupled in series. The MTJ memory element includes a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween. The magnetic reference layer structure includes one or more magnetic reference layers having a first invariable magnetization direction substantially perpendicular to layer planes thereof. The two-terminal selector element includes a first inert electrode and a second inert electrode with a volatile switching layer interposed therebetween; a first active electrode formed adjacent to the first inert electrode; and a second active electrode formed adjacent to the second inert electrode. The volatile switching layer includes at least one conductor layer interleaved with insulating layers.
    Type: Application
    Filed: February 18, 2020
    Publication date: June 11, 2020
    Inventors: Hongxin Yang, Bing K. Yen, Jing Zhang
  • Patent number: 10593727
    Abstract: The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element and a two-terminal selector element coupled in series. The MTJ memory element includes a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween. The magnetic reference layer structure includes one or more magnetic reference layers having a first invariable magnetization direction substantially perpendicular to layer planes thereof. The two-terminal selector element includes a first inert electrode and a second inert electrode with a volatile switching layer interposed therebetween; a first active electrode formed adjacent to the first inert electrode; and a second active electrode formed adjacent to the second inert electrode. The volatile switching layer includes a plurality of metal-rich particles or clusters embedded in a matrix or at least one conductor layer interleaved with insulating layers.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: March 17, 2020
    Assignee: Avalanche Technology, Inc.
    Inventors: Hongxin Yang, Bing K. Yen, Jing Zhang
  • Patent number: 10559624
    Abstract: The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element, which has a low resistance state and a high resistance state, and a two-terminal selector coupled to the MTJ memory element in series. The MTJ memory element includes a magnetic free layer and a magnetic reference layer with an insulating tunnel junction layer interposed therebetween. The two-terminal selector has an insulative state and a conductive state. The two-terminal selector in the conductive state has substantially lower resistance when switching the MTJ memory element from the low to high resistance state than from the high to low resistance state. The voltages applied to the memory cell to respectively switch the MTJ memory element from the low to high resistance state and from the high to low resistance state may be substantially same.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: February 11, 2020
    Assignee: Avalanche Technology, Inc.
    Inventors: Hongxin Yang, Xiaojie Hao, Jing Zhang, Xiaobin Wang, Bing K. Yen
  • Publication number: 20200006422
    Abstract: The present invention is directed to a memory cell array comprising an array of magnetic memory elements arranged in rows and columns; a plurality of electrodes, each of which is formed adjacent to a respective one of the array of magnetic memory elements; a plurality of first conductive lines, each of which is connected to a respective row of the array of magnetic memory elements along a row direction; and a plurality of composite lines. Each composite line includes a volatile switching layer connected to a respective column of the plurality of electrodes along a column direction; an electrode layer formed adjacent to the volatile switching layer; and a second conductive line formed adjacent to the electrode layer. The dimension of the volatile switching layer may be substantially larger than the size of the magnetic memory element along the row direction.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventors: Hongxin Yang, Bing K. Yen
  • Patent number: 10522590
    Abstract: The present invention is directed to a memory device including a magnetic memory element; a horizontal conductive line disposed above the magnetic memory element; a bottom electrode formed beneath the magnetic memory element and having a top, first and second sides that are opposite to each other; a first vertical conductive line formed adjacent to the first side of the bottom electrode with a first volatile switching layer and a first electrode layer interposed therebetween; and a second vertical conductive line formed adjacent to the second side of the bottom electrode with a second volatile switching layer and a second electrode layer interposed therebetween. The magnetic memory element is electrically connected to the horizontal conductive line at one end and to the bottom electrode at the other end.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: December 31, 2019
    Assignee: Avalanche Technology, Inc.
    Inventors: Kimihiro Satoh, Hongxin Yang
  • Publication number: 20190288031
    Abstract: The present invention is directed to a memory device including a magnetic memory element; a horizontal conductive line disposed above the magnetic memory element; a bottom electrode formed beneath the magnetic memory element and having a top, first and second sides that are opposite to each other; a first vertical conductive line formed adjacent to the first side of the bottom electrode with a first volatile switching layer and a first electrode layer interposed therebetween; and a second vertical conductive line formed adjacent to the second side of the bottom electrode with a second volatile switching layer and a second electrode layer interposed therebetween. The magnetic memory element is electrically connected to the horizontal conductive line at one end and to the bottom electrode at the other end.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 19, 2019
    Inventors: Kimihiro Satoh, Hongxin Yang
  • Patent number: 10388371
    Abstract: Embodiments provide a selector device for selecting a memory cell. The selector device includes a first electrode; a second electrode; and a switching layer sandwiched between the first electrode and the second electrode. The switching layer includes at least one metal rich layer and at least one chalcogenide rich layer. The metal rich layer includes at least one of a metal or a metal compound, wherein metal content of the metal rich layer is greater than 50 at. %. The chalcogenide content of the chalcogenide rich layer is greater than 50 at. %.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: August 20, 2019
    Assignee: Agency for Science, Technology and Research
    Inventors: Hongxin Yang, Minghua Li, Wei He, Yu Jiang, Fei Li
  • Publication number: 20190172871
    Abstract: The present invention is directed to a memory device that includes an array of memory cells. Each of the memory cells includes a memory element connected to a two-terminal selector element. The two-terminal selector element includes a first electrode and a second electrode with a volatile switching layer interposed therebetween. The second electrode is deposited on top of the volatile switching layer during fabrication. The first electrode has a composition comprising a metal element and the second electrode has a composition comprising the metal element and aluminum element. The metal element may be silver, copper, or nickel. The volatile switching layer may have a composite structure comprising a plurality of conductive particles embedded in an insulating matrix. Alternatively, the volatile switching layer may have a multilayer structure comprising one or more conductive layers interleaved with two or more insulating layers. The memory element may include a magnetic tunnel junction.
    Type: Application
    Filed: January 17, 2019
    Publication date: June 6, 2019
    Inventors: Hongxin Yang, Woojin Kim, Yiming Huai
  • Patent number: 10224367
    Abstract: The present invention is directed to a memory device that includes an array of memory cells. Each of the memory cells includes a memory element connected to a two-terminal selector element. The two-terminal selector element includes a first electrode and a second electrode with a switching layer interposed therebetween. The switching layer includes a plurality of metal-rich clusters embedded in a nominally insulating matrix. One or more conductive paths are formed in the switching layer when an applied voltage to the memory cell exceeds a threshold level. Each of the memory cells may further include an intermediate electrode interposed between the memory element and the two-terminal selector element. The two-terminal selector element may further include a third electrode formed between the first electrode and the switching layer, and a fourth electrode formed between the second electrode and the switching layer.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: March 5, 2019
    Assignee: Avalanche Technology, Inc.
    Inventors: Hongxin Yang, Kimihiro Satoh, Xiaobin Wang
  • Patent number: 10217934
    Abstract: The present invention is directed to a method for manufacturing a memory cell that includes a magnetic memory element electrically connected to a two-terminal selector.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: February 26, 2019
    Assignee: Avalanche Technology, Inc.
    Inventors: Hongxin Yang, Dong Ha Jung, Jing Zhang, Bing K. Yen
  • Patent number: 10177308
    Abstract: The present invention is directed to a method for manufacturing a memory cell that includes a magnetic memory element electrically connected to a two-terminal selector. The method includes the steps of depositing a magnetic memory element film stack on a substrate; depositing a selector film stack on top of the magnetic memory element film stack; etching the selector film stack with an etch mask formed thereon to remove at least a switching layer in the selector film stack not covered by the etch mask, thereby forming a selector pillar; depositing a first conforming dielectric layer over the selector pillar and surrounding surface; etching a portion of the first conforming dielectric layer covering the surrounding surface to form a first protective sleeve around at least the switching layer of the selector pillar; and etching the magnetic memory element film stack using the etch mask and the first protective sleeve as a composite mask to form a memory cell pillar.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: January 8, 2019
    Assignee: Avalanche Technology, Inc.
    Inventors: Hongxin Yang, Dong Ha Jung, Jing Zhang, Bing K. Yen
  • Publication number: 20180366642
    Abstract: The present invention is directed to a method for manufacturing a memory cell that includes a magnetic memory element electrically connected to a two-terminal selector.
    Type: Application
    Filed: August 24, 2018
    Publication date: December 20, 2018
    Inventors: Hongxin Yang, Dong Ha Jung, Jing Zhang, Bing K. Yen
  • Publication number: 20180358547
    Abstract: The present invention is directed to a method for manufacturing a memory cell that includes a magnetic memory element electrically connected to a two-terminal selector. The method includes the steps of depositing a magnetic memory element film stack on a substrate; depositing a selector film stack on top of the magnetic memory element film stack; etching the selector film stack with an etch mask formed thereon to remove at least a switching layer in the selector film stack not covered by the etch mask, thereby forming a selector pillar; depositing a first conforming dielectric layer over the selector pillar and surrounding surface; etching a portion of the first conforming dielectric layer covering the surrounding surface to form a first protective sleeve around at least the switching layer of the selector pillar; and etching the magnetic memory element film stack using the etch mask and the first protective sleeve as a composite mask to form a memory cell pillar.
    Type: Application
    Filed: June 9, 2017
    Publication date: December 13, 2018
    Inventors: Hongxin Yang, Dong Ha Jung, Jing Zhang, Bing K. Yen
  • Patent number: 10153017
    Abstract: The present invention is directed to a method for sensing the resistance state of a memory cell that includes an MTJ memory element coupled to a two-terminal selector element in series. The method includes the steps of raising a cell voltage across the memory cell above a threshold voltage for the selector element to become conductive; decreasing the cell voltage to a first sensing voltage and measuring a first sensing current passing through the memory cell, the selector element being nominally conductive irrespective of the resistance state of the MTJ memory element at the first sensing voltage; and further decreasing the cell voltage to a second sensing voltage and measuring a second sensing current, the selector element being nominally conductive if the MTJ memory element is in the low resistance state or nominally insulative if the MTJ memory element is in the high resistance state at the second sensing voltage.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: December 11, 2018
    Assignee: Avalanche Technology, Inc.
    Inventors: Hongxin Yang, Xiaobin Wang, Jing Zhang, Xiaojie Hao, Zihui Wang, Kimihiro Satoh
  • Publication number: 20180240845
    Abstract: The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element and a two-terminal selector element coupled in series. The MTJ memory element includes a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween. The magnetic reference layer structure includes one or more magnetic reference layers having a first invariable magnetization direction substantially perpendicular to layer planes thereof. The two-terminal selector element includes a first inert electrode and a second inert electrode with a volatile switching layer interposed therebetween; a first active electrode formed adjacent to the first inert electrode; and a second active electrode formed adjacent to the second inert electrode. The volatile switching layer includes a plurality of metal-rich particles or clusters embedded in a matrix or at least one conductor layer interleaved with insulating layers.
    Type: Application
    Filed: January 5, 2018
    Publication date: August 23, 2018
    Inventors: Hongxin Yang, Bing K. Yen, Jing Zhang
  • Publication number: 20180240844
    Abstract: The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element, which has a low resistance state and a high resistance state, and a two-terminal selector coupled to the MTJ memory element in series. The MTJ memory element includes a magnetic free layer and a magnetic reference layer with an insulating tunnel junction layer interposed therebetween. The two-terminal selector has an insulative state and a conductive state. The two-terminal selector in the conductive state has substantially lower resistance when switching the MTJ memory element from the low to high resistance state than from the high to low resistance state. The voltages applied to the memory cell to respectively switch the MTJ memory element from the low to high resistance state and from the high to low resistance state may be substantially same.
    Type: Application
    Filed: February 21, 2017
    Publication date: August 23, 2018
    Inventors: Hongxin Yang, Xiaojie Hao, Jing Zhang, Xiaobin Wang, Bing K. Yen
  • Publication number: 20180075891
    Abstract: The present invention is directed to a method for sensing the resistance state of a memory cell that includes an MTJ memory element coupled to a two-terminal selector element in series. The method includes the steps of raising a cell voltage across the memory cell above a threshold voltage for the selector element to become conductive; decreasing the cell voltage to a first sensing voltage and measuring a first sensing current passing through the memory cell, the selector element being nominally conductive irrespective of the resistance state of the MTJ memory element at the first sensing voltage; and further decreasing the cell voltage to a second sensing voltage and measuring a second sensing current, the selector element being nominally conductive if the MTJ memory element is in the low resistance state or nominally insulative if the MTJ memory element is in the high resistance state at the second sensing voltage.
    Type: Application
    Filed: September 14, 2016
    Publication date: March 15, 2018
    Inventors: Hongxin Yang, Xiaobin Wang, Jing Zhang, Xiaojie Hao, Zihui Wang, Kimihiro Satoh
  • Publication number: 20180012652
    Abstract: Embodiments provide a selector device for selecting a memory cell. The selector device includes a first electrode; a second electrode; and a switching layer sandwiched between the first electrode and the second electrode. The switching layer includes at least one metal rich layer and at least one chalcogenide rich layer. The metal rich layer includes at least one of a metal or a metal compound, wherein metal content of the metal rich layer is greater than 50 at. %. The chalcogenide content of the chalcogenide rich layer is greater than 50 at. %.
    Type: Application
    Filed: January 26, 2016
    Publication date: January 11, 2018
    Inventors: Hongxin Yang, Minghua Li, Wei He, Yu Jiang, Fei Li
  • Publication number: 20170338279
    Abstract: The present invention is directed to a memory device that includes an array of memory cells. Each of the memory cells includes a memory element connected to a two-terminal selector element. The two-terminal selector element includes a first electrode and a second electrode with a switching layer interposed therebetween. The switching layer includes a plurality of metal-rich clusters embedded in a nominally insulating matrix. One or more conductive paths are formed in the switching layer when an applied voltage to the memory cell exceeds a threshold level. Each of the memory cells may further include an intermediate electrode interposed between the memory element and the two-terminal selector element. The two-terminal selector element may further include a third electrode formed between the first electrode and the switching layer, and a fourth electrode formed between the second electrode and the switching layer.
    Type: Application
    Filed: May 18, 2016
    Publication date: November 23, 2017
    Inventors: Hongxin Yang, Kimihiro Satoh, Xiaobin Wang
  • Patent number: 9812499
    Abstract: The present invention is directed to a memory device including a memory cell coupled to two wiring lines at two ends thereof. The memory cell includes a memory element, which includes a magnetic free layer and a magnetic reference layer with a tunnel junction layer interposed therebetween, and a bi-directional two-terminal selector element having multiple threshold voltages coupled to the memory element in series. The magnetic free layer has a variable magnetization direction substantially perpendicular to a layer plane thereof and the magnetic reference layer has a fixed magnetization direction substantially perpendicular to a layer plane thereof. In an embodiment, the bi-directional two-terminal selector element includes two selector devices with each selector device including two electrodes with a switching layer interposed therebetween. In another embodiment, the bi-directional two-terminal selector element includes a selector device incorporating therein two switching layers.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: November 7, 2017
    Assignee: Avalanche Technology, Inc.
    Inventors: Kimihiro Satoh, Hongxin Yang