Abstract: An information display method, an information display apparatus, and an electronic device are provided. The information display method includes: acquiring a first interactive message card forwarded by a first terminal device, where the first interactive message card displayed by the first terminal device includes a data submission control element used to collect user data in response to an user interaction operation and send the collected user data to another electronic device; generating a second interactive message card based on the first interactive message card, where a data submission control element in the second interactive message card does not have a data collection function; and displaying the second interactive message card.

Abstract: The present invention relates to compounds of formula (I), wherein R1-R5 and L are as described herein, and their pharmaceutically acceptable salt thereof, and compositions including the compounds and methods of using the compounds.

Abstract: The present disclosure belongs to the technical field of animal medicine, and in particular relates to use of a vetiver (Chrysopogon zizanioides) product in preparation of a drug having an anti-inflammatory effect and capable of improving animal immunity. In the present disclosure, the vetiver, especially a water extract of vetiver prepared from a root of the vetiver may improve an immune regulation function of the body. In this way, the expression of various inflammatory factors in the body may be alleviated to significantly enhance the animal immunity and the anti-inflammation. Moreover, the drug of the present disclosure has wide selection of raw materials and a low cost.

Abstract: An integrated circuit package and a system including the integrated circuit package as well as a process for assembling the integrated circuit package are provided to improve integrated circuit power delivery. The integrated circuit package includes a first die having a plurality of pads formed in the first die and exposed on a top surface of the first die, at least one post on the first die, and a substrate including one or more redistribution layers. Each post in the at least one post spans at least two pads on the first die utilized for power distribution, and the first die is connected to the substrate via the at least one post.

Abstract: The present disclosure provides a chipset and a manufacturing method thereof. The chipset includes a logic chip, an input/output chip, and an interposer. The logic chip includes a plurality of first bonding components disposed in the first device layer. The input/output chip includes a plurality of second bonding components disposed in the second device layer. The interposer includes a plurality of third bonding components disposed in the third device layer. The logic chip is directly bonded to the first portion of the plurality of third bonding components of the interposer in a pad-to-pad manner through the first portion of the plurality of first bonding components, and the input/output chip is directly bonded to the second portion of the plurality of third bonding components of the interposer in a pad-to-pad manner through the plurality of second bonding components.

Abstract: An integrated circuit package and a system including the integrated circuit package as well as a process for assembling the integrated circuit package are provided to improve integrated circuit power delivery. The integrated circuit package includes a first die having a plurality of pads formed in the first die and exposed on a top surface of the first die, at least one post on the first die, and a substrate including one or more redistribution layers. Each post in the at least one post spans at least two pads on the first die utilized for power distribution, and the first die is connected to the substrate via the at least one post.

Abstract: An integrated circuit package and a system including the integrated circuit package as well as a process for assembling the integrated circuit package are provided to improve integrated circuit power delivery. The integrated circuit package includes a first die having a plurality of pads formed in the first die and exposed on a top surface of the first die, at least one post on the first die, and a substrate including one or more redistribution layers. Each post in the at least one post spans at least two pads on the first die utilized for power distribution, and the first die is connected to the substrate via the at least one post.

Abstract: Disclosed is a trifluoromethyl-substituted sulfonamide BCL-2-selective inhibitor, in particular disclosed are a compound of formula I, a stereoisomer or a pharmaceutically acceptable salt thereof, a preparation method therefor, and a pharmaceutical composition thereof. Also disclosed are the uses of said compound and of a pharmaceutical composition comprising same for treating anti-apoptotic BCL-2-related diseases, such as cancer.

Abstract: The present disclosure relates to a cementing plug comprising a first plug body (bottom plug), a second plug body (top plug), and a plurality of cleaning portions. The first plug body comprises: a first body provided therein with a chamber opening towards a lower end thereof, and an upper end of the first body being provided with a pressure portion; and an anti-rotation portion provided on an inner wall of the first body, and capable of being connected to slurry entering the chamber to limit a rotation of the first plug body. The second plug body comprises a second body. The plurality of cleaning portions is provided on outer sidewalls of the first body and the second body along a length direction thereof, for scraping off residuals (mud cake) on an inner wall of a casing.

Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.

Abstract: Provided is a method for preparing an intermediate of 6-arylaminopyridonecarboxamide compound as an MEK inhibitor, comprising preparing a compound of formula (III) as an intermediate of 6-arylaminopyridonecarboxamide compound using a compound of formula V as a raw material.

Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.

Abstract: Provided is a method for preparing an intermediate of 6-arylaminopyridonecarboxamide compound as an MEK inhibitor, comprising preparing a compound of formula (III) as an intermediate of 6-arylaminopyridonecarboxamide compound using a compound of formula V as a raw material.

Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.

Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.

Abstract: An integrated circuit package and a system including the integrated circuit package as well as a process for assembling the integrated circuit package are provided to improve integrated circuit power delivery. The integrated circuit package includes a first die having a plurality of pads formed in the first die and exposed on a top surface of the first die, at least one post on the first die, and a substrate including one or more redistribution layers. Each post in the at least one post spans at least two pads on the first die utilized for power distribution, and the first die is connected to the substrate via the at least one post.

Abstract: The present disclosure relates to a cementing plug comprising a first plug body (bottom plug), a second plug body (top plug), and a plurality of cleaning portions. The first plug body comprises: a first body provided therein with a chamber opening towards a lower end thereof, and an upper end of the first body being provided with a pressure portion; and an anti-rotation portion provided on an inner wall of the first body, and capable of being connected to slurry entering the chamber to limit a rotation of the first plug body. The second plug body comprises a second body. The plurality of cleaning portions is provided on outer sidewalls of the first body and the second body along a length direction thereof, for scraping off residuals (mud cake) on an inner wall of a casing.

Abstract: The present invention provides a controllable compound rotor system for the WECS, with a pilot rotor working under low wind speed conditions and a main rotor working under high speed conditions. By proper switching of the clutch, the WECS can not only achieve a greater starting torque under low wind speed conditions, as well as to capture and utilize the low wind-speed wind energy after being started, but also give full play to the advantage of the main rotor having the excellent wind capturing efficiency under high wind speed and high turning speed conditions. Thus the WECS can capture and utilize wind energy under both low and high wind speed conditions, which greatly expands the speed and zone range wherein the WECS can be applied, facilitating wide application of the WECS.

Abstract: The present invention provides a controllable compound rotor system for the WECS, with a pilot rotor working under low wind speed conditions and a main rotor working under high speed conditions. By proper switching of the clutch, the WECS can not only achieve a greater starting torque under low wind speed conditions, as well as to capture and utilize the low wind-speed wind energy after being started, but also give full play to the advantage of the main rotor having the excellent wind capturing efficiency under high wind speed and high turning speed conditions. Thus the WECS can capture and utilize wind energy under both low and high wind speed conditions, which greatly expands the speed and zone range wherein the WECS can be applied, facilitating wide application of the WECS.