Patents by Inventor Hongyong Xue
Hongyong Xue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11749716Abstract: A semiconductor device includes a semiconductor body having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process. Furthermore, the epitaxial layer field stop zone is formed with an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In some embodiments, the enhanced doping profile includes multiple doped regions with peak doping levels where a first doped region adjacent to a first side of the field stop zone has a first peak doping level that is not higher than a last peak doping level of a last doped region adjacent to the base region. The epitaxial layer field stop zone of the present invention enables complex field stop zone doping profiles to be used to obtain the desired soft-switching characteristics in the semiconductor device.Type: GrantFiled: May 4, 2021Date of Patent: September 5, 2023Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Lei Zhang, Karthik Padmanabhan, Lingpeng Guan, Jian Wang, Lingbing Chen, Wim Aarts, Hongyong Xue, Wenjun Li, Madhur Bobde
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Patent number: 11699627Abstract: A method comprises the steps of providing a wafer; applying a redistribution layer, grinding a back side of the wafer; depositing a metal layer; and applying a singulation process. A semiconductor package comprises a metal-oxide-semiconductor field-effect transistor (MOSFET), a redistribution layer, and a metal layer. The MOSFET comprises a source electrode, a gate electrode, a drain electrode and a plurality of partial drain plugs. The source electrode, the gate electrode, and the drain electrode are positioned at a front side of the MOSFET.Type: GrantFiled: February 26, 2021Date of Patent: July 11, 2023Assignee: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LPInventors: Yan Xun Xue, Long-Ching Wang, Hongyong Xue, Madhur Bobde, Zhiqiang Niu, Jun Lu
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Publication number: 20220278009Abstract: A method comprises the steps of providing a wafer; applying a redistribution layer, grinding a back side of the wafer; depositing a metal layer; and applying a singulation process. A semiconductor package comprises a metal-oxide-semiconductor field-effect transistor (MOSFET), a redistribution layer, and a metal layer. The MOSFET comprises a source electrode, a gate electrode, a drain electrode and a plurality of partial drain plugs. The source electrode, the gate electrode, and the drain electrode are positioned at a front side of the MOSFET.Type: ApplicationFiled: February 26, 2021Publication date: September 1, 2022Applicant: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LPInventors: Yan Xun Xue, Long-Ching Wang, Hongyong Xue, Madhur Bobde, Zhiqiang Niu, Jun Lu
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Publication number: 20210273046Abstract: A semiconductor device includes a semiconductor body having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process. Furthermore, the epitaxial layer field stop zone is formed with an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In some embodiments, the enhanced doping profile includes multiple doped regions with peak doping levels where a first doped region adjacent to a first side of the field stop zone has a first peak doping level that is not higher than a last peak doping level of a last doped region adjacent to the base region. The epitaxial layer field stop zone of the present invention enables complex field stop zone doping profiles to be used to obtain the desired soft-switching characteristics in the semiconductor device.Type: ApplicationFiled: May 4, 2021Publication date: September 2, 2021Inventors: Lei Zhang, Karthik Padmanabhan, Lingpeng Guan, Jian Wang, Lingbing Chen, Wim Aarts, Hongyong Xue, Wenjun Li, Madhur Bobde
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Patent number: 11031465Abstract: A semiconductor device includes a semiconductor body having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process. Furthermore, the epitaxial layer field stop zone is formed with an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In some embodiments, the enhanced doping profile formed in the field stop zone includes varying, non-constant doping levels. In some embodiments, the enhanced doping profile includes one of an extended graded doping profile, a multiple stepped flat doping profile, or a multiple spike doping profile. The epitaxial layer field stop zone of the present invention enables complex field stop zone doping profiles to be used to obtain the desired soft-switching characteristics in the semiconductor device.Type: GrantFiled: May 22, 2019Date of Patent: June 8, 2021Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Lei Zhang, Karthik Padmanabhan, Lingpeng Guan, Jian Wang, Lingbing Chen, Wim Aarts, Hongyong Xue, Wenjun Li, Madhur Bobde
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Patent number: 10833021Abstract: A method comprises the steps of providing a semiconductor device wafer; forming a first plurality of alignment marks on a first side of the semiconductor device wafer; forming a first pattern of a first conductivity type; forming a second plurality of alignment marks on a second side of the semiconductor device wafer; forming a bonded wafer by bonding a carrier wafer to the semiconductor device wafer; forming a third plurality of alignment marks on a free side of the carrier wafer; applying a grinding process; forming a plurality of device structure members; removing the carrier wafer; applying an implanting process and an annealing process; applying a metallization process and applying a singulation process.Type: GrantFiled: June 14, 2018Date of Patent: November 10, 2020Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.Inventors: Lei Zhang, Hongyong Xue, Jian Wang, Runtao Ning
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Patent number: 10763125Abstract: A semiconductor device comprising a substrate layer, an epitaxial layer, a dielectric layer, a first aluminum layer, a first titanium interlayer and a second aluminum layer. The first titanium interlayer is disposed between the first aluminum layer and the second aluminum layer. A process for fabricating a semiconductor device comprising the steps of: preparing a semiconductor wafer; depositing a first aluminum layer onto the semiconductor wafer; depositing a first titanium interlayer onto the first aluminum layer; depositing a second aluminum layer onto the first titanium interlayer; applying an etching process so that a plurality of trenches are formed so as to expose a plurality of top surfaces of a dielectric layer; and applying a singulation process so as to form a plurality of separated semiconductor devices.Type: GrantFiled: August 29, 2019Date of Patent: September 1, 2020Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN), LTD.Inventors: Wei He, Chris Wiebe, Hongyong Xue
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Patent number: 10686038Abstract: An RC-IGBT includes a semiconductor body incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process and the field stop zone has an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In alternate embodiments, RC-IGBT device, including the epitaxial layer field stop zone, are realized through a fabrication process that uses front side processing only to form the backside contact regions and the front side device region. The fabrication method forms an RC-IGBT device using front side processing to form the backside contact regions and then using wafer bonding process to flip the semiconductor structure onto a carrier wafer so that front side processing is used again to form the device region.Type: GrantFiled: November 2, 2018Date of Patent: June 16, 2020Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.Inventors: Hongyong Xue, Lei Zhang, Brian Schorr, Chris Wiebe, Wenjun Li
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Patent number: 10644118Abstract: Embodiments of the present disclosure provide a self-aligned contact for a trench power MOSFET device. The device has a layer of nitride provided over the conductive material in the gate trenches and over portions of mesas between every two adjacent contact structures. Alternatively, the device has an oxide layer over the conductive material in the gate trenches and over portions of mesas between every two adjacent contact structures. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.Type: GrantFiled: June 14, 2017Date of Patent: May 5, 2020Assignee: Alpha and Omega Semiconductor IncorporatedInventors: Hongyong Xue, Sik Lui, Terence Huang, Ching-Kai Lin, Wenjun Li, Yi Chang Yang, Jowei Dun
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Publication number: 20190385863Abstract: A semiconductor device comprising a substrate layer, an epitaxial layer, a dielectric layer, a first aluminum layer, a first titanium interlayer and a second aluminum layer. The first titanium interlayer is disposed between the first aluminum layer and the second aluminum layer. A process for fabricating a semiconductor device comprising the steps of: preparing a semiconductor wafer; depositing a first aluminum layer onto the semiconductor wafer; depositing a first titanium interlayer onto the first aluminum layer; depositing a second aluminum layer onto the first titanium interlayer; applying an etching process so that a plurality of trenches are formed so as to expose a plurality of top surfaces of a dielectric layer; and applying a singulation process so as to form a plurality of separated semiconductor devices.Type: ApplicationFiled: August 29, 2019Publication date: December 19, 2019Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Wei He, Chris Wiebe, Hongyong Xue
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Patent number: 10438813Abstract: A semiconductor device comprising a substrate layer, an epitaxial layer, a dielectric layer, a first aluminum layer, a first titanium interlayer and a second aluminum layer. The first titanium interlayer is disposed between the first aluminum layer and the second aluminum layer. A process for fabricating a semiconductor device comprising the steps of: preparing a semiconductor wafer; depositing a first aluminum layer onto the semiconductor wafer; depositing a first titanium interlayer onto the first aluminum layer; depositing a second aluminum layer onto the first titanium interlayer; applying an etching process so that a plurality of trenches are formed so as to expose a plurality of top surfaces of a dielectric layer; and applying a singulation process so as to form a plurality of separated semiconductor devices.Type: GrantFiled: November 13, 2017Date of Patent: October 8, 2019Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Wei He, Chris Wiebe, Hongyong Xue
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Patent number: 10424654Abstract: This invention discloses a semiconductor power device disposed in a semiconductor substrate including an active cell areas and a termination area. The semiconductor power device further comprises a plurality of gate trenches formed at a top portion of the semiconductor substrate in the active cell area wherein each of the gate trenches is partially filled with a conductive gate material with a top portion of the trenches filled by a high density plasma (HDP) insulation layer. The semiconductor power device further comprises mesa areas of the semiconductor substrate disposed between the gate trenches wherein the mesa areas are recessed and having a top mesa surface disposed vertically below a top surface of the HDP insulation layer wherein the HDP insulation layer covering over the conductive gate material constituting a stick-out boundary-defining layer surrounding the recessed mesa areas in the active cell areas between the gate trenches.Type: GrantFiled: June 27, 2018Date of Patent: September 24, 2019Assignee: Alpha and Omega Semiconductor IncorporatedInventors: Wenjun Li, Paul Thorup, Hong Chang, Yeeheng Lee, Yang Xiang, Jowei Dun, Hongyong Xue, Yiming Gu
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Publication number: 20190273131Abstract: A semiconductor device includes a semiconductor body having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process. Furthermore, the epitaxial layer field stop zone is formed with an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In some embodiments, the enhanced doping profile formed in the field stop zone includes varying, non-constant doping levels. In some embodiments, the enhanced doping profile includes one of an extended graded doping profile, a multiple stepped flat doping profile, or a multiple spike doping profile. The epitaxial layer field stop zone of the present invention enables complex field stop zone doping profiles to be used to obtain the desired soft-switching characteristics in the semiconductor device.Type: ApplicationFiled: May 22, 2019Publication date: September 5, 2019Inventors: Lei Zhang, Karthik Padmanabhan, Lingpeng Guan, Jian Wang, Lingbing Chen, Wim Aarts, Hongyong Xue, Wenjun Li, Madhur Bobde
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Publication number: 20190148165Abstract: A semiconductor device comprising a substrate layer, an epitaxial layer, a dielectric layer, a first aluminum layer, a first titanium interlayer and a second aluminum layer. The first titanium interlayer is disposed between the first aluminum layer and the second aluminum layer. A process for fabricating a semiconductor device comprising the steps of: preparing a semiconductor wafer; depositing a first aluminum layer onto the semiconductor wafer; depositing a first titanium interlayer onto the first aluminum layer; depositing a second aluminum layer onto the first titanium interlayer; applying an etching process so that a plurality of trenches are formed so as to expose a plurality of top surfaces of a dielectric layer; and applying a singulation process so as to form a plurality of separated semiconductor devices.Type: ApplicationFiled: November 13, 2017Publication date: May 16, 2019Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Wei He, Chris Wiebe, Hongyong Xue
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Publication number: 20190088745Abstract: An RC-IGBT includes a semiconductor body incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process and the field stop zone has an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In alternate embodiments, RC-IGBT device, including the epitaxial layer field stop zone, are realized through a fabrication process that uses front side processing only to form the backside contact regions and the front side device region. The fabrication method forms an RC-IGBT device using front side processing to form the backside contact regions and then using wafer bonding process to flip the semiconductor structure onto a carrier wafer so that front side processing is used again to form the device region.Type: ApplicationFiled: November 2, 2018Publication date: March 21, 2019Inventors: Hongyong Xue, Lei Zhang, Brian Schorr, Chris Wiebe, Wenjun Li
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Publication number: 20190006467Abstract: An RC-IGBT includes a semiconductor body formed having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process and the field stop zone has an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In alternate embodiments, RC-IGBT device, including the epitaxial layer field stop zone, are realized through a fabrication process that uses front side processing only to form the backside contact regions and the front side device region. The fabrication method forms an RC-IGBT device using front side processing to form the backside contact regions and then using wafer bonding process to flip the semiconductor structure onto a carrier wafer so that front side processing is used again to form the device region.Type: ApplicationFiled: June 29, 2017Publication date: January 3, 2019Inventors: Hongyong Xue, Lei Zhang, Brian Schorr, Chris Wiebe, Wenjun Li
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Publication number: 20190006285Abstract: A method comprises the steps of providing a semiconductor device wafer; forming a first plurality of alignment marks on a first side of the semiconductor device wafer; forming a first pattern of a first conductivity type; forming a second plurality of alignment marks on a second side of the semiconductor device wafer; forming a bonded wafer by bonding a carrier wafer to the semiconductor device wafer; forming a third plurality of alignment marks on a free side of the carrier wafer; applying a grinding process; forming a plurality of device structure members; removing the carrier wafer; applying an implanting process and an annealing process; applying a metallization process and applying a singulation process.Type: ApplicationFiled: June 14, 2018Publication date: January 3, 2019Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Lei Zhang, Hongyong Xue, Jian Wang, Runtao Ning
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Publication number: 20190006461Abstract: A semiconductor device includes a semiconductor body having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process. Furthermore, the epitaxial layer field stop zone is formed with an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In some embodiments, the enhanced doping profile formed in the field stop zone includes varying, non-constant doping levels. In some embodiments, the enhanced doping profile includes one of an extended graded doping profile, a multiple stepped flat doping profile, or a multiple spike doping profile. The epitaxial layer field stop zone of the present invention enables complex field stop zone doping profiles to be used to obtain the desired soft-switching characteristics in the semiconductor device.Type: ApplicationFiled: June 29, 2017Publication date: January 3, 2019Inventors: Lei Zhang, Karthik Padmanabhan, Lingpeng Guan, Jian Wang, Lingbing Chen, Wim Aarts, Hongyong Xue, Wenjun Li, Madhur Bobde
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Patent number: 10170559Abstract: An RC-IGBT includes a semiconductor body formed having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process and the field stop zone has an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In alternate embodiments, RC-IGBT device, including the epitaxial layer field stop zone, are realized through a fabrication process that uses front side processing only to form the backside contact regions and the front side device region. The fabrication method forms an RC-IGBT device using front side processing to form the backside contact regions and then using wafer bonding process to flip the semiconductor structure onto a carrier wafer so that front side processing is used again to form the device region.Type: GrantFiled: June 29, 2017Date of Patent: January 1, 2019Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.Inventors: Hongyong Xue, Lei Zhang, Brian Schorr, Chris Wiebe, Wenjun Li
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Publication number: 20180323282Abstract: This invention discloses a semiconductor power device disposed in a semiconductor substrate including an active cell areas and a termination area. The semiconductor power device further comprises a plurality of gate trenches formed at a top portion of the semiconductor substrate in the active cell area wherein each of the gate trenches is partially filled with a conductive gate material with a top portion of the trenches filled by a high density plasma (HDP) insulation layer. The semiconductor power device further comprises mesa areas of the semiconductor substrate disposed between the gate trenches wherein the mesa areas are recessed and having a top mesa surface disposed vertically below a top surface of the HDP insulation layer wherein the HDP insulation layer covering over the conductive gate material constituting a stick-out boundary-defining layer surrounding the recessed mesa areas in the active cell areas between the gate trenches.Type: ApplicationFiled: June 27, 2018Publication date: November 8, 2018Applicant: Alpha & Omega Semiconductor, IncorporatedInventors: Wenjun Li, Paul Thorup, Hong Chang, Yeeheng Lee, Yang Xiang, Jowei Dun, Hongyong Xue, Yiming Gu