Abstract: A semiconductor device may include a substrate, a first nanowire, a second nanowire, a first gate insulating layer, a second gate insulating layer, a first metal layer and a second metal layer. The first gate insulating layer may be along a periphery of the first nanowire. The second gate insulating layer may be along a periphery of the second nanowire. The first metal layer may be on a top surface of the first gate insulating layer along the periphery of the first nanowire. The first metal layer may have a first crystal grain size. The second metal layer may be on a top surface of the second gate insulating layer along the periphery of the second nanowire. The second metal layer may have a second crystal grain size different from the first crystal grain size.

Abstract: Provided are a silicon nitride film etching composition, a method of etching a silicon nitride film using the same, and a manufacturing method of a semiconductor device. Specifically, a silicon nitride film may be stably etched with a high selection ratio relative to a silicon oxide film, and when the composition is applied to an etching process at a high temperature and a semiconductor manufacturing process, not only no precipitate occurs but also anomalous growth in which the thickness of the silicon oxide film is rather increased does not occur, thereby minimizing defects and reliability reduction.

Abstract: Example embodiments provide for an apparatus for testing various kinds of semiconductor devices having different distances between probes. Example embodiments also provide for a method of fabricating and using said apparatus. In accordance with example embodiments, an apparatus for testing a semiconductor device may include at least one cable penetrating a plate and extending from a surface of the plate. The at least one cable may include at least one signal line and at least one ground line. The apparatus may also include a pair of probes connected to the at least one signal line and configured to contact a first pad of a semiconductor device and a second pad of the semiconductor device. In accordance with example embodiments, the apparatus for testing a semiconductor device may also include a control unit on the surface of the plate configured to control a distance between the pair of probes.

Abstract: The probe card is comprised of a probe card wafer, a plurality of through via electrodes penetrating the probe card wafer; and a plurality of redistributed wiring probe needle structures, each being connected to the through via electrodes protruding from a surface of the probe card wafer.

Abstract: The present disclosure relates to a wafer burn-in system having a device cooling a probe card and thereby restraining heat accumulation in the probe card. The disclosed wafer burn-in system includes a probe station and a tester. The probe station includes a burn-in chamber, a probe head, and a wafer stage. The probe head has a probe card installed on the lower surface of the probe head. A cooling device restrains heat accumulation in the probe card, e.g., by generating airflow around the probe card. The wafer stage of the burn-in chamber fixes a wafer loaded on the upper surface of the wafer stage and elevates the wafer for contact with the probe card. The tester connects to the probe station through a general purpose interface bus (GPIB) to convey test signals to and from the probe head, and to control operation of the cooling device. The tester activates the cooling device, e.g.

Abstract: Example embodiments provide for an apparatus for testing various kinds of semiconductor devices having different distances between probes. Example embodiments also provide for a method of fabricating and using said apparatus. In accordance with example embodiments, an apparatus for testing a semiconductor device may include at least one cable penetrating a plate and extending from a surface of the plate. The at least one cable may include at least one signal line and at least one ground line. The apparatus may also include a pair of probes connected to the at least one signal line and configured to contact a first pad of a semiconductor device and a second pad of the semiconductor device. In accordance with example embodiments, the apparatus for testing a semiconductor device may also include a control unit on the surface of the plate configured to control a distance between the pair of probes.

Abstract: A probe card for that may be used to test a plurality of semiconductor chips formed on a wafer. The probe card may include a substrate; a plurality of probe blocks that form a pattern corresponding to the pattern formed by the plurality of semiconductor chips formed on the wafer; and a plurality of probe needles formed in the probe blocks and arranged in a pattern corresponding to a plurality of pads formed in the plurality of semiconductor chips. The use of the probe card may decrease the testing time for the wafer.

Abstract: The present disclosure relates to a wafer burn-in system having a device cooling a probe card and thereby restraining heat accumulation in the probe card. The disclosed wafer burn-in system includes a probe station and a tester. The probe station includes a burn-in chamber, a probe head, and a wafer stage. The probe head has a probe card installed on the lower surface of the probe head. A cooling device restrains heat accumulation in the probe card, e.g., by generating airflow around the probe card. The wafer stage of the burn-in chamber fixes a wafer loaded on the upper surface of the wafer stage and elevates the wafer for contact with the probe card. The tester connects to the probe station through a general purpose interface bus (GPIB) to convey test signals to and from the probe head, and to control operation of the cooling device. The tester activates the cooling device, e.g.

Abstract: A probe card for use in testing at least two Quad Pad IC chips at the same time, includes a printed circuit board having an aperture extending therethrough, a plurality of pins for probing contact pads formed on the chips and electrically connected to the circuitry of the printed circuit board, a fixing ring extending around the aperture and positioning the pins relative to the test chips, and a fixing bridge traversing the fixing ring and disposed over a region between two of the test chip locations. Those pins which are for contacting the contact pads closest to the fixing ring protrude from and are supported by the sides of the fixing ring. On the other hand, the contact pads which will lie rather far from the sides of the fixing ring are probed by pins protruding from and supported by the fixing bridge.