Abstract: An electronic device includes a controller; and a non-transitory computer-readable storage medium configured to store operation codes for causing the controller to execute processes. The non-transitory computer-readable storage medium includes a plurality of memory blocks. The processes include grouping the plurality of memory blocks into a plurality of super blocks; selecting a first super block among the plurality of super blocks depending on one or more logical addresses corresponding to write-requested data, and writing the data; and mapping the first super block to a first logical address range. The first logical address range is configured by successive addresses corresponding to a super block size, and a start address of the successive addresses is a start logical address of the one or more logical addresses.

Abstract: A cover window of a flexible display device includes a base substrate including an out-folding area, an in-folding area, and peripheral areas disposed on opposing sides of at least one of the out-folding area and the in-folding area, a first hard coating layer at a top surface of the base substrate, the first hard coating layer having a substantially uniform thickness, and a second hard coating layer at a bottom surface of the base substrate opposite to the top surface, the second hard coating layer having a thickness different from the thickness of the first hard coating layer. A thickness of a first area of the second hard coating layer that overlaps with the out-folding area and the in-folding area of the base substrate is less than a thickness of a second area of the second hard coating layer that overlaps with the peripheral areas of the base substrate.

Abstract: An integrated circuit including: a power rail including first and second conductive lines spaced apart from each other in a vertical direction, wherein the first and second conductive lines extend in parallel to each other in a first horizontal direction, and are electrically connected to each other, to supply power to a first standard cell, wherein the first and second conductive lines are disposed at a boundary of the first standard cell; and a third conductive line between the first and second conductive lines and extending in a second horizontal direction orthogonal to the first horizontal direction, to transfer an input signal or an output signal of the first standard cell.

Abstract: An integrated circuit includes a standard cell. The standard cell may include a plurality of gate lines and a plurality of first wirings. The plurality of first wirings may include a clubfoot structure conductive pattern that includes a first conductive pattern and a second conductive pattern spaced apart from each other. Each of the first conductive pattern and the second conductive pattern may include a first line pattern extending in a first direction and a second line pattern protruding from one end of the first line pattern in a direction perpendicular to the first direction. The plurality of gate lines may be spaced apart from each other by a first pitch in the first direction, and the plurality of second wirings may be spaced apart from each other by a second pitch in the first direction. The first pitch may be greater than the second pitch.

Abstract: Earphones comprise a first earphone for collecting a first biosignal and a second earphone for collecting a second biosignal. The second earphone is wirelessly connected to the first earphone and configured to quantize the second biosignal into a second digital signal and transmit the second digital signal to the first earphone together with a set of marker bits representing a time at which the second biosignal is collected. The first earphone includes a biosignal processor configured to quantize the first biosignal into a first digital signal and synchronize the first and second digital signals with reference to the set of marker bits to generate an electrocardiogram (ECG) signal; and a transmitter configured to transmit the ECG signal to a digital device wirelessly connected to the first earphone.

Abstract: Disclosed a normalized metadata generation device, and object occlusion detection device and method. A normalized metadata generation method includes generating a multi-ellipsoid based three-dimensional human model using perspective features of a plurality of two-dimensional images obtained by the multiple cameras, performing scene calibration based on the three-dimensional human model to normalize object information of the object included in the two-dimensional images, and generating normalized metadata of the object from the two-dimensional images on which the scene calibration is performed.

Abstract: The present invention provides a novel lactic acid bacterium having antioxidant and anti-aging functions and a dementia alleviation effect, and more specifically, provides Lactobacillus pentosus var. plantarum C29 KCCM11291P and Lactobacillus curvatus C3 KCCM430009. In addition, the present invention provides an antioxidant and anti-aging pharmaceutical composition and a dietary supplement containing the Lactobacillus pentosus var. plantarum C29 KCCM11291P or Lactobacillus curvatus C3 KCCM430009 of the present invention as an active ingredient, and a composition for preventing or treating dementia and a dietary supplement for preventing or alleviating dementia, containing Lactobacillus pentosus var. plantarum C29 KCCM11291P or Lactobacillus curvatus C3 KCCM430009 as an active ingredient. Additionally, the present invention provides a composition for preventing or treating dementia, containing a fermentation composition, as an active ingredient, fermented by Lactobacillus pentosus var.

Abstract: An analog-digital converter includes a count code generator to receive a code generation clock signal from a clock signal generator and to output a count code according to the code generation clock signal, a latch to latch the count code, an operating circuit to generate a count value of the count code and to output a digital signal based on the count value, and a transfer controller to transfer the count code from the latch to the operating circuit. The transfer controller determines whether to transfer the count code according to a logic level of a count enable clock signal generated from the clock signal generator.

Abstract: A cover window of a flexible display device includes a base substrate including an out-folding area, an in-folding area, and peripheral areas disposed on opposing sides of at least one of the out-folding area and the in-folding area, a first hard coating layer at a top surface of the base substrate, the first hard coating layer having a substantially uniform thickness, and a second hard coating layer at a bottom surface of the base substrate opposite to the top surface, the second hard coating layer having a thickness different from the thickness of the first hard coating layer. A thickness of a first area of the second hard coating layer that overlaps with the out-folding area and the in-folding area of the base substrate is less than a thickness of a second area of the second hard coating layer that overlaps with the peripheral areas of the base substrate.

Abstract: An apparatus for harvesting energy includes an AC harvester having an AC harvesting capacitor and configured to extract power from an AC environment energy source, a DC harvester configured to extract power from a DC environment energy source, and a power transferrer configured to control a transfer path of power extracted from the DC harvester based on a magnitude of a voltage of the AC harvesting capacitor and a magnitude of a voltage applied from the DC harvester.

Abstract: A memory device includes a first memory cell that is connected with a first source line, a first word line, and a first bit line, a first write circuit to receive first write data that are stored in the first memory cell through a first write input/output line and to control a voltage of the first source line and a voltage of the first bit line based on the first write data, and a first pull-down circuit to receive first pull-down data corresponding to the first write data from the first write circuit through a first internal metal line and to pulls down the voltage of at least one of the first source line and the first bit line to a predetermined voltage based on the first pull-down data.

Abstract: An induction heating device includes a first resonance circuit comprising a first working coil and a first resonance capacitor, a first inverter electrically connected to the first resonance circuit and configured to perform a first switching operation to thereby apply a first resonance current to the first working coil, a first group of snubber capacitors that are configured to be electrically connected to the first inverter, the first group of snubber capacitors comprising a first snubber capacitor and a second snubber capacitor, and a first relay configured to selectively connect the first group of snubber capacitors to the first inverter.

Abstract: An integrated circuit includes first and second active regions extending in a first direction, a first gate line extending in a second direction substantially perpendicular to the first direction and crossing the first and second active regions, and a first contact jumper including a first conductive pattern intersecting the first gate line above the first active region and a second conductive pattern extending in the second direction above the first gate line and connected to the first conductive pattern.

Abstract: A method and an apparatus for analyzing a component of an object are provided. The apparatus includes an image sensor including an optical module, and the optical module includes a light source configured to emit a source light, a first detector configured to detect a first light that is scattered or reflected from the object on which the emitted source light is incident, and a second detector configured to detect a second light that is emitted by the light source but is not incident on the object. The apparatus further includes a processor configured to calculate a scattering coefficient and an absorption coefficient, based on the detected first light and the detected second light, and analyze the component of the object, based on the calculated scattering coefficient and the calculated absorption coefficient.

Abstract: A memory device includes a cell array including cells, an address transition detector outputting a transition detection signal as to whether an address of a write command is changed, and a control logic circuit generating one of word-line-on signals for performing a write operation on the cell array in response to the write command, and terminating the write operation in accordance with the transition detection signal. The word-line-on signals include a long-kept word-line-on signal that stays active before the address is changed and a divided word-line-on signal that is, before the address is changed, divided into sub-word-line-on signals.

Abstract: An integrated circuit including: a power rail including first and second conductive lines spaced apart from each other in a vertical direction, wherein the first and second conductive lines extend in parallel to each other in a first horizontal direction, and are electrically connected to each other, to supply power to a first standard cell, wherein the first and second conductive lines are disposed at a boundary of the first standard cell; and a third conductive line between the first and second conductive lines and extending in a second horizontal direction orthogonal to the first horizontal direction, to transfer an input signal or an output signal of the first standard cell.

Abstract: Provided is a method for fabricating high-uniformity and high-quality metal chalcogenide thin films. The method for fabricating metal chalcogenide thin films may include forming a metal precursor thin film including a metal thin film and a chalcogen thin film disposed on the upper surface or lower surface of the metal thin film; and performing a chalcogenization process for providing a chalcogen source on the metal precursor thin film to form a first metal chalcogenide thin film.

Abstract: A server may include a communication circuit communicating with a user terminal, storage including a fingerprint DB storing fingerprints corresponding to a plurality of points and a signal fluctuation probability DB, and a processor electrically connected to the communication circuit and the storage. The processor may be configured to store similarity between first signal strength and second signal strength, which are determined based on a probability that a pair of the first signal strength and the second signal strength received from a first AP occurs with respect to fingerprints corresponding to a first point, in the signal fluctuation probability DB, to obtain a fingerprint including signal strength received from the first AP, from the user terminal, and to determine a location of the user terminal based on the obtained fingerprint and the signal fluctuation probability DB.

Abstract: An apparatus for analyzing an in vivo component is provided. The apparatus for analyzing an in vivo component may include an impedance sensor including a first electrode and a second electrode configured to contact a fluid channel of a fluid to be analyzed. The apparatus may include an impedance measurement device configured to apply a current to the first electrode and the second electrode, measure a voltage between the first electrode and the second electrode based on applying the current, and measure an impedance of the fluid based on the measured voltage. The apparatus may include a processor configured to model the measured impedance using an equivalent circuit; and analyze the in vivo component based on modeling the measured impedance using the equivalent circuit.

Abstract: In one embodiment, the standard cell includes first and second active regions defining an intermediate region between the first and second active regions; and first, second and third gate lines crossing the first and second active regions and crossing the intermediate region. The first gate line is divided into an upper first gate line and a lower first gate line by a first gap insulating layer in the intermediate region, the second gate line is undivided, and the third gate line is divided into an upper third gate line and a lower third gate line by a second gap insulating layer in the intermediate region.