Patents by Inventor Hoon-Sang Jin

Hoon-Sang Jin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8806260
    Abstract: A method and a device for generating a clock signal determine a number of pulses to be discarded from each predetermined cycle of a reference clock signal in order to obtain, on average, a target frequency. A masking pattern is created for discarding the number of pulses to be discarded from each predetermined cycle of the reference clock signal. The clock signal, which includes the target frequency, is generated by discarding the number of pulses from the reference clock signal using the masking pattern.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: August 12, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chi-ho Cha, Hoon-sang Jin
  • Patent number: 8165866
    Abstract: An emulation system includes a controller, an emulation calculator, an emulation storage unit, and an interface unit. The emulation calculator includes a device under test (DUT) and emulates the DUT. The emulation storage unit stores emulation data of the DUT emulated by the emulation calculator under the control of the controller. The interface unit distributes and transfers the emulation data to a plurality of computers under the control of the controller.
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: April 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chi-Ho Cha, Hoon-Sang Jin, Jae-Geun Yun
  • Publication number: 20110239035
    Abstract: A method and a device for generating a clock signal determine a number of pulses to be discarded from each predetermined cycle of a reference clock signal in order to obtain, on average, a target frequency. A masking pattern is created for discarding the number of pulses to be discarded from each predetermined cycle of the reference clock signal. The clock signal, which includes the target frequency, is generated by discarding the number of pulses from the reference clock signal using the masking pattern.
    Type: Application
    Filed: June 6, 2011
    Publication date: September 29, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chi-ho CHA, Hoon-sang JIN
  • Patent number: 7949510
    Abstract: A method and system for distributed simultaneous simulation are provided, the method including providing a state of at least one storage unit, providing a segment of the circuit bounded by the at least one storage unit, and simulating the segment in accordance with the state of the at least one storage unit; and the system including a memory for describing storage units of a circuit, maintaining states of the storage units, and identifying distributed segments comprising combinational logic separated by the storage units, and processing units, each for simultaneously simulating at least one of the segments in accordance with the maintained states.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: May 24, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chi-Ho Cha, Hoon-Sang Jin, Hyun-Uk Jung
  • Publication number: 20080061855
    Abstract: A method and a device for generating a clock signal determine a number of pulses to be discarded from each predetermined cycle of a reference clock signal in order to obtain, on average, a target frequency. A masking pattern is created for discarding the number of pulses to be discarded from each predetermined cycle of the reference clock signal. The clock signal, which includes the target frequency, is generated by discarding the number of pulses from the reference clock signal using the masking pattern.
    Type: Application
    Filed: September 11, 2007
    Publication date: March 13, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chi-ho CHA, Hoon-sang JIN
  • Publication number: 20080046228
    Abstract: An emulation system includes a controller, an emulation calculator, an emulation storage unit, and an interface unit. The emulation calculator includes a device under test (DUT) and emulates the DUT. The emulation storage unit stores emulation data of the DUT emulated by the emulation calculator under the control of the controller. The interface unit distributes and transfers the emulation data to a plurality of computers under the control of the controller.
    Type: Application
    Filed: August 13, 2007
    Publication date: February 21, 2008
    Inventors: Chi-Ho Cha, Hoon-Sang Jin, Jae-Geun Yun
  • Publication number: 20070266355
    Abstract: A method and system for distributed simultaneous simulation are provided, the method including providing a state of at least one storage unit, providing a segment of the circuit bounded by the at least one storage unit, and simulating the segment in accordance with the state of the at least one storage unit; and the system including a memory for describing storage units of a circuit, maintaining states of the storage units, and identifying distributed segments comprising combinational logic separated by the storage units, and processing units, each for simultaneously simulating at least one of the segments in accordance with the maintained states.
    Type: Application
    Filed: May 11, 2007
    Publication date: November 15, 2007
    Inventors: Chi-Ho CHA, Hoon-Sang Jin, Hyun-Uk Jung