Patents by Inventor Hoon Siong Chia

Hoon Siong Chia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10302694
    Abstract: One example includes a test system that includes a printed circuit board and a switching interposer board. The switching interposer board is comprised of a probe point, a first bus, a second bus, and a set of switches. Each switch includes a first terminal, a second terminal, and a third terminal, the first terminal being coupled to a respective pin of an integrated circuit device, the second terminal being coupled to the first bus, and the third terminal being coupled to the second bus. Each of the set of switches have a first state that selectively couples a pair of the pins of the integrated circuit device to each other through the first bus during a short test, and a second state that selectively couples at least one of the pins of the integrated circuit device to the probe point through the second bus during a voltage level spike test.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: May 28, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Chee Peng Ong, Hoon Siong Chia
  • Publication number: 20180180668
    Abstract: One example includes a test system that includes a printed circuit board and a switching interposer board. The switching interposer board is comprised of a probe point, a first bus, a second bus, and a set of switches. Each switch includes a first terminal, a second terminal, and a third terminal, the first terminal being coupled to a respective pin of an integrated circuit device, the second terminal being coupled to the first bus, and the third terminal being coupled to the second bus. Each of the set of switches have a first state that selectively couples a pair of the pins of the integrated circuit device to each other through the first bus during a short test, and a second state that selectively couples at least one of the pins of the integrated circuit device to the probe point through the second bus during a voltage level spike test.
    Type: Application
    Filed: December 27, 2016
    Publication date: June 28, 2018
    Inventors: CHEE PENG ONG, HOON SIONG CHIA
  • Patent number: 9207278
    Abstract: An electronic package that has an array of pins may be tested for shorts and continuity in a parallel manner. The array of pins are allocated to four or more groups of pins such that each pin in each group is not adjacent to a pin from its own group of pins. One of the groups of pins is tested for continuity while placing a reference voltage level on all of the pins in the other groups of pins. A separate current source is coupled to each pin and a resultant voltage is measured. A short between one of the pins in the first group and a pin in one of the other groups can be detected when the resultant voltage on one of the pins in the first group is approximately equal to the reference voltage. Group-wise testing is repeated until all groups have been tested.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: December 8, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hoon Siong Chia, Chee Peng Ong
  • Publication number: 20140285229
    Abstract: An electronic package that has an array of pins may be tested for shorts and continuity in a parallel manner. The array of pins are allocated to four or more groups of pins such that each pin in each group is not adjacent to a pin from its own group of pins. One of the groups of pins is tested for continuity while placing a reference voltage level on all of the pins in the other groups of pins. A separate current source is coupled to each pin and a resultant voltage is measured. A short between one of the pins in the first group and a pin in one of the other groups can be detected when the resultant voltage on one of the pins in the first group is approximately equal to the reference voltage. Group-wise testing is repeated until all groups have been tested.
    Type: Application
    Filed: March 22, 2013
    Publication date: September 25, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: Hoon Siong Chia, Chee Peng Ong