Patents by Inventor Horii Hideki

Horii Hideki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7750431
    Abstract: Storage cells for a semiconductor device can include a first layer of phase change material on a substrate and a second layer of phase change material being in contact with the first layer, the second layer of phase change material having a higher resistance than the first layer.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: July 6, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Horii Hideki
  • Patent number: 7704787
    Abstract: Phase-changeable memory devices and method of fabricating phase-changeable memory devices are provided that include a phase-changeable material pattern of a phase-changeable material that includes nitrogen atoms. First and second electrodes are electrically connected to the phase-changeable material pattern and provide an electrical signal thereto. The phase-changeable material pattern may have a polycrystalline structure.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: April 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Horii Hideki, Jeong-hee Park
  • Patent number: 7485559
    Abstract: A semiconductor device and methods thereof. The semiconductor device includes a first layer formed on a substrate, the first layer having a higher conductivity. The semiconductor device further includes a second layer formed on the first layer, the second layer including a hole exposing a portion of the first layer, the exposed portion of the first layer having a lower conductivity. The method includes forming a first layer on a substrate, the first layer having a higher conductivity, forming a second layer on the first layer, exposing a portion of the first layer by forming a hole in the second layer, performing a process on at least the exposed portion of the first layer, the process decreasing the conductivity of the exposed portion. The exposed portion including the lower conductivity or higher resistivity may block heat from conducting in the first layer.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: February 3, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Lae Cho, Horii Hideki
  • Patent number: 7476917
    Abstract: A phase-changeable memory device includes a substrate having a field effect transistor therein and a phase-changeable material electrically coupled to a source region of the field effect transistor. The phase-changeable material includes a chalcogenide composition containing at least germanium, bismuth and tellurium and at least one dopant selected from a group consisting of nitrogen and silicon.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: January 13, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Horii Hideki, Bong-Jin Kuh, Yong-Ho Ha, Jeong-hee Park, Ji-Hye Yi
  • Patent number: 7462900
    Abstract: Phase-changeable memory devices and method of fabricating phase-changeable memory devices are provided that include a phase-changeable material pattern of a phase-changeable material that may include nitrogen atoms and/or silicon atoms. First and second electrodes are electrically connected to the phase-changeable material pattern and provide an electrical signal thereto. The phase-changeable material pattern may have a polycrystal line structure.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: December 9, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Horii Hideki, Bong-Jin Kuh, Yong-Ho Ha, Jeong-hee Park, Ji-Hye Yi
  • Publication number: 20080205127
    Abstract: Storage cells for a semiconductor device can include a first layer of phase change material on a substrate and a second layer of phase change material being in contact with the first layer, the second layer of phase change material having a higher resistance than the first layer.
    Type: Application
    Filed: February 19, 2008
    Publication date: August 28, 2008
    Inventor: Horii Hideki
  • Patent number: 7402851
    Abstract: Phase-changeable memory devices and method of fabricating phase-changeable memory devices are provided that include a phase-changeable material pattern of a phase-changeable material that may include nitrogen atoms and/or silicon atoms. First and second electrodes are electrically connected to the phase-changeable material pattern and provide an electrical signal thereto. The phase-changeable material pattern may have a polycrystalline structure.
    Type: Grant
    Filed: August 4, 2004
    Date of Patent: July 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Horii Hideki, Bong-Jin Kuh, Yong-Ho Ha, Jeong-hee Park, Ji-Hye Yi
  • Publication number: 20080169457
    Abstract: Phase-changeable memory devices and method of fabricating phase-changeable memory devices are provided that include a phase-changeable material pattern of a phase-changeable material that may include nitrogen atoms and/or silicon atoms. First and second electrodes are electrically connected to the phase-changeable material pattern and provide an electrical signal thereto. The phase-changeable material pattern may have a polycrystal line structure.
    Type: Application
    Filed: February 28, 2008
    Publication date: July 17, 2008
    Inventors: Horii Hideki, Bong-Jin Kuh, Yong-Ho Ha, Jeong-hee Park, Ji-Hye Yi
  • Patent number: 7387938
    Abstract: Storage cells for a phase change memory device and phase change memory devices are provided that include a first phase change material pattern and a first high-resist phase change material pattern on the first phase change material pattern. The first high-resist phase change material pattern has a higher resistance than the first phase change material pattern. Methods of fabricating such storage cells and/or memory devices are also provided.
    Type: Grant
    Filed: April 10, 2006
    Date of Patent: June 17, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Horii Hideki
  • Patent number: 7378701
    Abstract: An integrated circuit phase changeable memory device includes an integrated circuit substrate, a first electrode on the integrated circuit substrate, and a second electrode on the integrated circuit substrate and spaced apart from the first electrode. A carbon nano tube and a phase changeable layer are serially disposed between the first and second electrodes. An insulating layer can include a contact hole and the carbon nano tube may be provided in the contact hole. Moreover, the phase changeable layer also may be provided at least partially in the contact hole. A layer also may be provided at least partially surrounding the carbon nano tube in the contact hole. Related fabrication methods also are provided.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: May 27, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Horii Hideki
  • Publication number: 20070221906
    Abstract: A phase-changeable memory device includes a substrate having a field effect transistor therein and a phase-changeable material electrically coupled to a source region of the field effect transistor. The phase-changeable material includes a chalcogenide composition containing at least germanium, bismuth and tellurium and at least one dopant selected from a group consisting of nitrogen and silicon.
    Type: Application
    Filed: May 30, 2007
    Publication date: September 27, 2007
    Inventors: Horii Hideki, Bong-Jin Kuh, Yong-Ho Ha, Jeong-hee Park, Ji-Hye Yi
  • Publication number: 20070018157
    Abstract: Storage cells for a phase change memory device and phase change memory devices are provided that include a first phase change material pattern and a first high-resist phase change material pattern on the first phase change material pattern. The first high-resist phase change material pattern has a higher resistance than the first phase change material pattern. Methods of fabricating such storage cells and/or memory devices are also provided.
    Type: Application
    Filed: April 10, 2006
    Publication date: January 25, 2007
    Inventor: Horii Hideki
  • Publication number: 20060281217
    Abstract: Phase-changeable memory devices and method of fabricating phase-changeable memory devices are provided that include a phase-changeable material pattern of a phase-changeable material that includes nitrogen atoms. First and second electrodes are electrically connected to the phase-changeable material pattern and provide an electrical signal thereto. The phase-changeable material pattern may have a polycrystalline structure.
    Type: Application
    Filed: August 22, 2006
    Publication date: December 14, 2006
    Inventors: Horii Hideki, Jeong-hee Park
  • Patent number: 7115927
    Abstract: Phase-changeable memory devices and method of fabricating phase-changeable memory devices are provided that include a phase-changeable material pattern of a phase-changeable material that includes nitrogen atoms. First and second electrodes are electrically connected to the phase-changeable material pattern and provide an electrical signal thereto. The phase-changeable material pattern may have a polycrystalline structure.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: October 3, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Horii Hideki, Jeong-hee Park
  • Patent number: 7061013
    Abstract: Storage cells for a phase change memory device and phase change memory devices are provided that include a first phase change material pattern and a first high-resist phase change material pattern on the first phase change material pattern. The first high-resist phase change material pattern has a higher resistance than the first phase change material pattern. Methods of fabricating such storage cells and/or memory devices are also provided.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: June 13, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Horii Hideki
  • Publication number: 20060030108
    Abstract: A semiconductor device and methods thereof. The semiconductor device includes a first layer formed on a substrate, the first layer having a higher conductivity. The semiconductor device further includes a second layer formed on the first layer, the second layer including a hole exposing a portion of the first layer, the exposed portion of the first layer having a lower conductivity. The method includes forming a first layer on a substrate, the first layer having a higher conductivity, forming a second layer on the first layer, exposing a portion of the first layer by forming a hole in the second layer, performing a process on at least the exposed portion of the first layer, the process decreasing the conductivity of the exposed portion. The exposed portion including the lower conductivity or higher resistivity may block heat from conducting in the first layer.
    Type: Application
    Filed: June 10, 2005
    Publication date: February 9, 2006
    Inventors: Sung-Lae Cho, Horii Hideki
  • Publication number: 20060016396
    Abstract: An apparatus for depositing a thin film on a substrate includes a housing, a substrate support portion, a securing member, a heater, a target member and a plasma generator. The housing defines a process chamber. The substrate support portion is disposed in the process chamber to support the substrate. The securing member is adapted to non-electrically secure the substrate to the substrate support portion during performance of a process. The heater is provided to maintain the substrate supported by the substrate support portion at a process temperature. The target member faces the substrate support portion and includes materials to be deposited on the substrate. The plasma generator is adapted to excite a process gas supplied into the process chamber into a plasma state.
    Type: Application
    Filed: July 12, 2005
    Publication date: January 26, 2006
    Inventors: Bong-Jin Kuh, Horii Hideki, Soon-Oh Park, Jang-Eun Lee, Yong-Ho Ha
  • Patent number: 6894305
    Abstract: Phase change memory devices include a phase-change memory layer on a semiconductor substrate. The phase-change memory layer has a major axis that is substantially parallel to a major axis of the semiconductor substrate and has a first surface and a second surface opposite the first surface that are substantially parallel to the major axis of the phase-change memory layer. A first electrode is provided on the semiconductor substrate that is electrically connected to the first surface of the phase-change memory layer in a first contact region of the phase-change memory layer. A second electrode is provided on the semiconductor substrate that is electrically connected to the phase-change memory layer in a second contact region of the phase-change memory layer. The second contact region is space apart from the first contact region.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: May 17, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-hye Yi, Horii Hideki, Yong-ho Ha
  • Publication number: 20050098814
    Abstract: Methods of fabricating phase changeable memory devices are provided. The methods include forming a first storage active region on an integrated circuit substrate having a first width. A second storage active region is formed on the integrated circuit substrate having a second width. A transistor active region is formed on the integrated circuit substrate between the first and second active regions. The first and second widths are less than a width of the transistor active region.
    Type: Application
    Filed: December 10, 2004
    Publication date: May 12, 2005
    Inventor: Horii Hideki
  • Patent number: 6849892
    Abstract: Phase changeable memory devices include an integrated circuit substrate and first and second storage active regions on the integrated circuit substrate. The first and second storage active regions have a first width and a second width, respectively. A transistor active region on the integrated circuit substrate is between the first and second active regions, the first and seconds widths being less than a width of the transistor active region.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: February 1, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Horii Hideki