Abstract: A physiological information collecting system and a transceiver device thereof are configured to collect physiological information from animal bodies. The transceiver device includes a front-end circuit, a follower circuit, a quadrature delay line and an output circuit. The front-end circuit separates a discontinuous signal into an in-phase signal and a quadrature signal. The follower circuit outputs a control voltage and rotates the in-phase signal by a predetermined phase angle to output a follower signal. The quadrature delay line rotates the quadrature signal by a corresponding phase angle according to the control voltage. The output circuit synthesizes the follower signal and the quadrature signal and outputs a data signal by demodulating the discontinuous signal.

Abstract: A smart diaper sensor, which may be disposed inside a diaper, and may include a sensing element and a wireless RF circuit. The wireless RF circuit may include a transmitter and a wake-up receiver. The wake-up receiver may receive a wake-up signal transmitted from a backend platform to wake up the transmitter. The sensing element may sense the environmental status inside the diaper to generate a sensing signal. The transmitter may receive the sensing signal, and then transmit the sensing signal to the backend platform.

Abstract: A physiological information collecting system and a transceiver device thereof are configured to collect physiological information from animal bodies. The transceiver device includes a front-end circuit, a follower circuit, a quadrature delay line and an output circuit. The front-end circuit separates a discontinuous signal into an in-phase signal and a quadrature signal. The follower circuit outputs a control voltage and rotates the in-phase signal by a predetermined phase angle to output a follower signal. The quadrature delay line rotates the quadrature signal by a corresponding phase angle according to the control voltage. The output circuit synthesizes the follower signal and the quadrature signal and outputs a data signal by demodulating the discontinuous signal.

Abstract: A current-mode analog baseband apparatus is provided. The apparatus includes a current-mode low-order filter, a current-mode programmable gain amplifier (PGA) unit and a high-order filter. The input impedance is smaller than the output impedance in the current-mode low-order filter. An input terminal of the current-mode PGA unit is connected to an output terminal of the current-mode low-order filter. An input terminal of the high-order filter is connected to an output terminal of the current-mode PGA unit.

Abstract: A current-mode analog baseband apparatus is provided. The apparatus includes a current-mode low-order filter, a current-mode programmable gain amplifier (PGA) unit and a high-order filter. The input impedance is smaller than the output impedance in the current-mode low-order filter. An input terminal of the current-mode PGA unit is connected to an output terminal of the current-mode low-order filter. An input terminal of the high-order filter is connected to an output terminal of the current-mode PGA unit.

Abstract: A current-mode analog baseband apparatus is provided. The apparatus includes a current-mode low-order filter, a current-mode programmable gain amplifier (PGA) unit and a high-order filter. The input impedance is smaller than the output impedance in the current-mode low-order filter. An input terminal of the current-mode PGA unit is connected to an output terminal of the current-mode low-order filter. An input terminal of the high-order filter is connected to an output terminal of the current-mode PGA unit.

Abstract: A current-mode amplifier including an input stage, a feedback circuit and an output stage is provided. The input stage has an input terminal for receiving an input current of the current-mode amplifier. The input stage generates a corresponding inner current in accordance with the input current and a feedback current. The feedback circuit is connected to the input stage. The feedback circuit generates the corresponding feedback current in accordance with the inner current of the input stage. An input terminal of the output stage is connected to an output terminal of the input stage. An output terminal of the output stage serves as an output terminal of the current-mode amplifier.

Abstract: A current-mode analog baseband apparatus is provided. The apparatus includes a current-mode low-order filter, a current-mode programmable gain amplifier (PGA) unit and a high-order filter. The input impedance is smaller than the output impedance in the current-mode low-order filter. An input terminal of the current-mode PGA unit is connected to an output terminal of the current-mode low-order filter. An input terminal of the high-order filter is connected to an output terminal of the current-mode PGA unit.

Abstract: A current-mode amplifier including an input stage, a feedback circuit and an output stage is provided. The input stage has an input terminal for receiving an input current of the current-mode amplifier. The input stage generates a corresponding inner current in accordance with the input current and a feedback current. The feedback circuit is connected to the input stage. The feedback circuit generates the corresponding feedback current in accordance with the inner current of the input stage. An input terminal of the output stage is connected to an output terminal of the input stage. An output terminal of the output stage serves as an output terminal of the current-mode amplifier.

Abstract: A current-mode amplifier including an input stage, a feedback circuit and an output stage is provided. The input stage has an input terminal for receiving an input current of the current-mode amplifier. The input stage generates a corresponding inner current in accordance with the input current and a feedback current. The feedback circuit is connected to the input stage. The feedback circuit generates the corresponding feedback current in accordance with the inner current of the input stage. An input terminal of the output stage is connected to an output terminal of the input stage. An output terminal of the output stage serves as an output terminal of the current-mode amplifier.

Abstract: A front-end circuit with coherent tunable filters is provided. The circuit includes a first filter, an amplifier, and a second filter. The amplifier is coupled to the first filter, and the second filter is coupled to the amplifier. Furthermore, the amplifier is placed between the first and second filters. The first filter has a first tunable intermediate frequency, and is used to filter a received signal. The amplifier is used to amplify the output of the first filter. The second filter has a second tunable intermediate frequency, and is used to filter the output of the amplifier. The first and second intermediate frequencies have a coherent-tuning relation with each other.

Abstract: A pipeline time-to-digital converter (TDC) is provided. The pipeline TDC includes a plurality of TDC cells. Each of the TDC cells includes a delay unit, an output unit and a determination unit. The delay unit receives a first clock signal and a first reference signal output from a previous stage TDC cell. The delay unit generates sampling phases in a period between a trigger edge of the first reference signal and a trigger edge of the first clock signal, and samples the first clock signal to obtain sampling values in accordance with the sampling phases. The output unit calculates the sampling values for outputting a conversion value. The determination unit uses and analyses the sampling values and the sampling phases for outputting time residue to a next stage TDC cell.

Abstract: A pipeline time-to-digital converter (TDC) is provided. The pipeline TDC includes a plurality of TDC cells. Each of the TDC cells includes a delay unit, an output unit and a determination unit. The delay unit receives a first clock signal and a first reference signal output from a previous stage TDC cell. The delay unit generates sampling phases in a period between a trigger edge of the first reference signal and a trigger edge of the first clock signal, and samples the first clock signal to obtain sampling values in accordance with the sampling phases. The output unit calculates the sampling values for outputting a conversion value. The determination unit uses and analyses the sampling values and the sampling phases for outputting time residue to a next stage TDC cell.

Abstract: A device for voltage-noise rejection and fast start-up is provided. It comprises a low-pass filter connected to a voltage source, a voltage-controlled switch connected in parallel with the low-pass filter, and an auxiliary start-up element connected to a DC-only voltage output. By using a transistor operating in the triode region and a capacitor with suitable capacitance, it is suitable for integration to form a low-frequency low-pass pole to suppress the noise in the reference current. The auxiliary start-up element overcomes the large turn on time caused by the low frequency low-pass pole. As there is no static current during normal operation, the power consumption for the device is low.

Abstract: A circuit and a method for calibrating the direct-current offset in the signal output from a signal processing unit are provided. The calibration circuit includes a 1-bit quantizer, a control logic unit and a digital-to-analog converter. The 1-bit quantizer is coupled to the output end of the signal processing unit for receiving and detecting a direct-current offset component in the output signal so as to obtain quantization information. The control logic unit is coupled to the 1-bit quantizer for sequentially setting one of a plurality of bits of a compensation value and updating the set bit according to the quantization information. The digital-to-analog converter is coupled to the control logic unit for compensating the direct-current offset component in the signal output from the signal processing unit according to the compensation value.

Abstract: A frequency synthesizer with automatic calibration includes a voltage-controlled oscillator, which has several working bands for receiving a coarse-tuned signal and a fine-tuned signal and generating an output signal in the working band of the coarse-tuned signals; preliminary frequency divider unit, which receives the output signal and generates an intermediate signal by frequency dividing; a feedback frequency divider unit, which receives the intermediate signal and generates a feedback signal by frequency dividing; an automatic calibration unit, which receives the input signal and the intermediate signal to generate a coarse-tuned signal; a phase-frequency comparator, which compares the input signal with the feedback signal and generates an error signal according to the frequency and phase differences between the input signal and the feedback signal; and a low-pass filter, which filters the error signal and generates a fine-tuned signal.

Abstract: A circuit and a method for calibrating the direct-current offset in the signal output from a signal processing unit are disclosed. The calibration circuit includes a 1-bit quantizer, a control logic unit and a digital-to-analog converter. The 1-bit quantizer is coupled to the output end of the signal processing unit for receiving and detecting a direct-current offset component in the output signal so as to obtain quantization information. The control logic unit is coupled to the 1-bit quantizer for sequentially setting one of a plurality of bits of a compensation value and updating the set bit according to the quantization information. The digital-to-analog converter is coupled to the control logic unit for compensating the direct-current offset component in the signal output from the signal processing unit according to the compensation value.

Abstract: A front-end circuit with coherent tunable filters is provided. The circuit includes a first filter, an amplifier, and a second filter. The amplifier is coupled to the first filter, and the second filter is coupled to the amplifier. Furthermore, the amplifier is placed between the first and second filters. The first filter has a first tunable intermediate frequency, and is used to filter a received signal. The amplifier is used to amplify the output of the first filter. The second filter has a second tunable intermediate frequency, and is used to filter the output of the amplifier. The first and second intermediate frequencies have a coherent-tuning relation with each other.

Abstract: An ultra-wideband (UWB) frequency synthesizer is provided for use in UWB communication. The UWB frequency synthesizer may include a first section and a second section. The first section may be configured to generate a first plurality of frequencies. The second section may be coupled to the first section and configured to generate a second plurality of frequencies respectively corresponding to individual channels of UWB bandwidth based upon the first plurality of frequencies. Further, the first section is configured to include a voltage-controlled oscillator (VCO) providing a base frequency fvco corresponding to the UWB bandwidth, and to generate the first plurality of frequencies based on a single phase-locked loop (PLL) and a reference frequency provided to the single PLL based on the base frequency fvco.

Abstract: A voltage controlled oscillator with anti supply voltage variation and/or process variation includes an oscillation circuit for outputting an oscillatory signal; a current source coupled to the oscillation circuit for providing an input current to the oscillation circuit; and a variation compensation circuit for compensating the variations generated by the supply voltage and process. The variation compensation circuit includes a peak detector for generating a peak voltage proportional to the amplitude of the oscillatory signal; a compensating voltage generator for generating a reference voltage according to the process variation so that the oscillation circuit achieves the same working conditions under the process variation; and a comparator for comparing the peak voltage and the reference voltage to generate a control voltage. When the variation compensation circuit includes an amplifier, the supply voltage can be compensated.