Patents by Inventor Horst Brüggmann

Horst Brüggmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12245383
    Abstract: The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) or IC substrates including through-holes and/or grate structures filled with copper, which comprises the steps of: a) providing a multi-layer substrate; b) forming a non-copper conductive layer or a copper layer on the cover layer and on an inner surface of the through-hole, respectively on an inner surface of the grate structure; c) forming a patterned masking film; d) electrodepositing copper; e) removing the masking film; and f) electrodepositing a copper filling.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: March 4, 2025
    Assignee: Atotech Deutschland GmbH & Co. KG
    Inventors: Bert Reents, Akif Özkök, Soungsoo Kim, Horst Brüggmann, Herwig Josef Berthold, Marcin Klobus, Thomas Schiwon, Marko Mirkovic
  • Publication number: 20250066946
    Abstract: A device for gripping a workpiece (2) and electrically contacting at least one surface of the workpiece (2) comprises a first member (9;44;82;120;155) extending between a first end (12;47;85;123;158) and a second end (13;48;86;124;159) and a second member (8;43;81;119;154) extending between a first end (10;45;83;121;156) and a second end (11;46;84;122;157) and movably journalled with respect to the first member (9;44;82;120;155) to allow the workpiece (2) to be inserted between the respective first ends (10,12;45,47;83,85;121,123;156,158) and held between the first and second members (8,9;43,44;81,82;119,120;154,155) at respective clamping locations that are closer to the first ends (10,12;45,47;83,85;121,123;156,158) than to the second ends (11,13;46,48;84,86;122,124;157,159) along the extents of the first and second members (8,9;43,44;81,82;119,120;154,155).
    Type: Application
    Filed: December 23, 2022
    Publication date: February 27, 2025
    Applicant: ATOTECH DEUTSCHLAND GMBH & CO. KG
    Inventors: Ferdinand WIENER, Falk BACHMANN, Christian SCHIRMER, Johannes STROBEL, Bjoern REISER, Horst BRUEGGMANN, Britta SCHELLER
  • Publication number: 20240341042
    Abstract: The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) or IC substrates including through-holes and/or grate structures filled with copper, which comprises the steps of: a) providing a multi-layer substrate; b) forming a non-copper conductive layer or a copper layer on the cover layer and on an inner surface of the through-hole, respectively on an inner surface of the grate structure; c) forming a patterned masking film; d) electrodepositing copper; e) removing the masking film; and f) electrodepositing a copper filling.
    Type: Application
    Filed: June 18, 2024
    Publication date: October 10, 2024
    Applicant: Atotech Deutschland GmbH & Co. KG
    Inventors: Bert REENTS, Akif ÖZKÖK, Soungsoo KIM, Horst BRÜGGMANN, Herwig Josef BERTHOLD, Marcin KLOBUS, Thomas SCHIWON, Marko MIRKOVIC
  • Patent number: 12063751
    Abstract: The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) including microvias filled with copper comprising the steps of: a1) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a cover layer, and (iii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b1) depositing a conductive layer; or a2) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b2) depositing a conductive layer; and c) electrodepositing a copper filling in the microvia and a first copper layer on the conductive layer which form together a planar surface and the thickness of the first copper layer is from 0.1 to 3 ?m.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: August 13, 2024
    Assignee: Atotech Deutschland GmbH & Co. KG
    Inventors: Akif Özkök, Bert Reents, Mustafa Özkök, Marko Mirkovic, Markus Youkhanis, Horst Brüggmann, Sven Lamprecht, Kai-Jens Matejat
  • Publication number: 20220304164
    Abstract: The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) including microvias filled with copper comprising the steps of: a1) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a cover layer, and (iii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b1) depositing a conductive layer; or a2) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b2) depositing a conductive layer; and c) electrodepositing a copper filling in the microvia and a first copper layer on the conductive layer which form together a planar surface and the thickness of the first copper layer is from 0.1 to 3 ?m.
    Type: Application
    Filed: August 19, 2020
    Publication date: September 22, 2022
    Inventors: Akif ÖZKÖK, Bert REENTS, Mustafa ÖZKÖK, Marko MIRKOVIC, Markus YOUKHANIS, Horst BRÜGGMANN, Sven LAMPRECHT, Kai-Jens MATEJAT
  • Publication number: 20220279662
    Abstract: The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) or IC substrates including through-holes and/or grate structures filled with copper, which comprises the steps of: a) providing a multi-layer substrate; b) forming a non-copper conductive layer or a copper layer on the cover layer and on an inner surface of the through-hole, respectively on an inner surface of the grate structure; c) forming a patterned masking film; d) electrodepositing copper; e) removing the masking film; and f) electrodepositing a copper filling.
    Type: Application
    Filed: August 19, 2020
    Publication date: September 1, 2022
    Inventors: Bert REENTS, Akif ÖZKÖK, Soungsoo KIM, Horst BRÜGGMANN, Herwig Josef BERTHOLD, Marcin KLOBUS, Thomas SCHIWON, Marko MIRKOVIC
  • Patent number: 11015257
    Abstract: Method for electroplating a metal onto a flat substrate P. Surfaces are electrically polarized for metal deposition by feeding thereto at least one first and second forward-reverse pulse current sequences. The first forward-reverse pulse current sequence includes a first forward pulse generating a first cathodic current during a first forward pulse duration tf1 and having a first forward pulse peak current if1, and a first reverse pulse generating a first anodic current during a first reverse pulse duration tr1 and having a first reverse pulse peak current ir1, the second forward-reverse pulse current sequence including a second forward pulse generating a second cathodic current during a second forward pulse duration tf2 and having a second forward pulse peak current if2, and a second reverse pulse generating a second anodic current during a second reverse pulse duration tr2, the second reverse pulse having a second reverse pulse peak current ir2.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: May 25, 2021
    Assignee: Atotech Deutschland GmbH
    Inventors: Toshia Fujiwara, Horst Brüggmann, Roland Herold, Thomas Schiwon
  • Publication number: 20200080217
    Abstract: Method for electroplating a metal onto a flat substrate P. Surfaces are electrically polarized for metal deposition by feeding thereto at least one first and second forward-reverse pulse current sequences. The first forward-reverse pulse current sequence includes a first forward pulse generating a first cathodic current during a first forward pulse duration tf1 and having a first forward pulse peak current if1, and a first reverse pulse generating a first anodic current during a first reverse pulse duration tr1 and having a first reverse pulse peak current ir1, the second forward-reverse pulse current sequence including a second forward pulse generating a second cathodic current during a second forward pulse duration tf2 and having a second forward pulse peak current if2, and a second reverse pulse generating a second anodic current during a second reverse pulse duration tr2, the second reverse pulse having a second reverse pulse peak current ir2.
    Type: Application
    Filed: November 11, 2019
    Publication date: March 12, 2020
    Applicant: Atotech Deutschland GmbH
    Inventors: Toshia Fujiwara, Horst Brüggmann, Roland Herold, Thomas Schiwon
  • Patent number: 10501860
    Abstract: Method for electroplating a metal onto a flat substrate P. Surfaces are electrically polarized for metal deposition by feeding thereto at least one first and second forward-reverse pulse current sequences. The first forward-reverse pulse current sequence includes a first forward pulse generating a first cathodic current during a first forward pulse duration tf1 and having a first forward pulse peak current if1, and a first reverse pulse generating a first anodic current during a first reverse pulse duration tr1 and having a first reverse pulse peak current ir1, the second forward-reverse pulse current sequence including a second forward pulse generating a second cathodic current during a second forward pulse duration tf2 and having a second forward pulse peak current if2, and a second reverse pulse generating a second anodic current during a second reverse pulse duration tr2, the second reverse pulse having a second reverse pulse peak current ir2.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: December 10, 2019
    Assignee: Atotech Deutschland GmbH
    Inventors: Toshia Fujiwara, Horst Brüggmann, Roland Herold, Thomas Schiwon
  • Publication number: 20180010258
    Abstract: Method for electroplating a metal onto a flat substrate P. Surfaces are electrically polarized for metal deposition by feeding thereto at least one first and second forward-reverse pulse current sequences. The first forward-reverse pulse current sequence includes a first forward pulse generating a first cathodic current during a first forward pulse duration tf1 and having a first forward pulse peak current if1, and a first reverse pulse generating a first anodic current during a first reverse pulse duration tr1 and having a first reverse pulse peak current ir1, the second forward-reverse pulse current sequence including a second forward pulse generating a second cathodic current during a second forward pulse duration tf2 and having a second forward pulse peak current if2, and a second reverse pulse generating a second anodic current during a second reverse pulse duration tr2, the second reverse pulse having a second reverse pulse peak current ir2.
    Type: Application
    Filed: December 2, 2015
    Publication date: January 11, 2018
    Applicant: Atotech Deutschland GmbH
    Inventors: Toshia Fujiwara, Horst Brüggmann, Roland Herold, Thomas Schiwon