Abstract: A circuit is disclosed for fault-monitoring a microprocessor. The circuit includes an oscillator having an output signal of the same frequency as a test signal output of the microprocessor. The circuit also includes a binary counter. The microprocessor test output is coupled to the reset input of the counter and the oscillator is coupled to the counting input of the counter. The counter counts when the test signal does not correspond in frequency to the oscillator signal. A lower order output signal of the counter is used as a reset for the microprocessor and a higher order output of the counter is used to generate a fault indicating signal if the microprocessor has not resumed correct operation and to inhibit the microprocessor. The oscillator is coupled to the counting input of the counter through a logic circuit. The two outputs of the counter are coupled to another logic circuit which supplies the reset and inhibit signals to the microprocessor.