Patents by Inventor Hossein Zarei

Hossein Zarei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9077573
    Abstract: A transmitter includes: a digital modulator configured to modulate a base-band signal in a digital domain into a modulated signal; a synchronization module configured to synchronize the modulated signal with a clock signal; and an analog output stage configured to convert the modulated signal into an analog signal for transmission.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: July 7, 2015
    Assignee: Marvell World Trade Ltd.
    Inventor: Hossein Zarei
  • Patent number: 9018996
    Abstract: Circuits, architectures, a system and methods for providing quadrature output signals. The circuit generally includes a quadrature signal generator and a plurality of frequency dividers. The plurality of frequency dividers are each configured to receive a plurality of quadrature signal generator outputs at a first frequency and provide a plurality of outputs at a second frequency. The method generally includes providing a plurality of quadrature signals at a first frequency and dividing the first frequency of the quadrature signals by n, wherein n is an odd integer of at least 3, thereby providing a plurality of divided-by-n quadrature outputs at a second frequency, wherein the second frequency is about equal to the first frequency divided by n. The present disclosure further advantageously improves quadrature signal generation accuracy, reliability and/or performance.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: April 28, 2015
    Assignee: Marvell International Ltd.
    Inventor: Hossein Zarei
  • Patent number: 8994571
    Abstract: An analog-to-digital converter (ADC) and a receiver that includes the ADC is disclosed. The ADC includes a first filter configured to receive a signal in an I-signal path of the receiver and a second filter configured to receive a signal in a Q-signal path of the receiver. The ADC further includes a quantizer alternatingly in connection with the first and second filters, and at least one DAC alternatingly in connection with the first and second filters. Switches in the ADC are configured to alternate connection between an input of the quantizer and outputs of the first and second filters, and are also configured to alternate connection between an output of the at least one DAC and inputs of the first and second filters.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: March 31, 2015
    Assignee: Marvell International Ltd.
    Inventors: Hossein Zarei, Chieh-Yu Hsieh
  • Patent number: 8947067
    Abstract: Disclosed is bandgap voltage reference generator having a programmable resistor. The programmable resistor can be programmed to provide a proper ratio between the PTAT current and the CTAT current to reduce the effect of process variations on the bandgap voltage. The bandgap voltage reference generator includes a calibration circuit that programs the programmable resistor.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: February 3, 2015
    Assignee: Marvell International Ltd.
    Inventor: Hossein Zarei
  • Publication number: 20130259158
    Abstract: A transmitter includes: a digital modulator configured to modulate a base-band signal in a digital domain into a modulated signal; a synchronization module configured to synchronize the modulated signal with a clock signal; and an analog output stage configured to convert the modulated signal into an analog signal for transmission.
    Type: Application
    Filed: April 2, 2013
    Publication date: October 3, 2013
    Inventor: Hossein ZAREI
  • Patent number: 8264392
    Abstract: An analog-to-digital converter (ADC) and a receiver that includes the ADC is disclosed. The ADC includes a first filter configured to receive a signal in an I-signal path of the receiver and a second filter configured to receive a signal in a Q-signal path of the receiver. The ADC further includes a quantizer alternatingly in connection with the first and second filters, and at least one DAC alternatingly in connection with the first and second filters. Switches in the ADC are configured to alternate connection between an input of the quantizer and outputs of the first and second filters, and are also configured to alternate connection between an output of the at least one DAC and inputs of the first and second filters.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: September 11, 2012
    Assignee: Marvell International Ltd.
    Inventors: Hossein Zarei, Chieh-Yu Hsieh
  • Patent number: 8243855
    Abstract: An integrated receiver circuit includes a phase locked loop circuit (21) with a voltage controlled oscillator (VCO) (25) and a quadrature generator circuit (29) which uses hybrid-branch line coupler circuits (27, 28) coupled to buffered VCO outputs, where the hybrid-branch line coupler circuits (27, 28) are tuned by same control voltage (25a) that controls the VCO (25). By replicating the VCO core circuitry in each hybrid-branch line coupler circuit (27, 28) under common control of a control voltage, calibrated quadrature signals are generated that have the same frequency as the phase locked loop circuit (21).
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: August 14, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Hossein Zarei
  • Publication number: 20090279642
    Abstract: An integrated receiver circuit includes aphase locked loop circuit (21) with a voltage controlled oscillator (VCO) (25) and a quadrature generator circuit (29) which uses hybrid-branch line coupler circuits (27, 28) coupled to buffered VCO outputs, where the hybrid-branch line coupler circuits (27, 28) are tuned by same control voltage (25a) that controls the VCO (25). By replicating the VCO core circuitry in each hybrid-branch line coupler circuit (27, 28) under common control of a control voltage, calibrated quadrature signals are generated that have the same frequency as the phase locked loop circuit (21).
    Type: Application
    Filed: May 9, 2008
    Publication date: November 12, 2009
    Inventor: Hossein Zarei